UPD78F1502AGK-GAK-AX Datasheet, PDF (734/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 18 DMA CONTROLLER
Here are examples of functions using DMA.
• Successive transfer of serial interface
• Batch transfer of analog data
• Capturing A/D conversion result at fixed interval
• Capturing port value at fixed interval
18.2 Configuration of DMA Controller
The DMA controller includes the following hardware.
Item
Address registers
Count register
Control registers
Table 18-1. Configuration of DMA Controller
Configuration
• DMA SFR address registers 0, 1 (DSA0, DSA1)
• DMA RAM address registers 0, 1 (DRA0, DRA1)
• DMA byte count registers 0, 1 (DBC0, DBC1)
• DMA mode control registers 0, 1 (DMC0, DMC1)
• DMA operation control registers 0, 1 (DRC0, DRC1)
(1) DMA SFR address register n (DSAn)
This is an 8-bit register that is used to set an SFR address that is the transfer source or destination of DMA
channel n.
Set the lower 8 bits of the SFR addresses FFF00H to FFFFFH^Note.
This register is not automatically incremented but fixed to a specific value.
In the 16-bit transfer mode, the least significant bit is ignored and is treated as an even address.
DSAn can be read or written in 8-bit units. However, it cannot be written during DMA transfer.
Reset signal generation clears this register to 00H.
Note Except for address FFFFEH because the PMC register is allocated there.
Figure 18-1. Format of DMA SFR Address Register n (DSAn)
Address: FFFB0H (DSA0), FFFB1H (DSA1) After reset: 00H R/W
76543210
DSAn
Remark n: DMA channel number (n = 0, 1)
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011