UPD78F1502AGK-GAK-AX Datasheet, PDF (223/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 5 CLOCK GENERATOR
(2) Subsystem clock
• XT1 clock oscillator
This circuit oscillates a clock of fSUB = 32.768 kHz by connecting a 32.768 kHz resonator to XT1 and XT2.
Oscillation can be stopped by setting XTSTOP (bit 6 of CSC).
(3) Internal low-speed oscillation clock (clock for watchdog timer)
• Internal low-speed oscillator
This circuit oscillates a clock of fIL = 30 kHz (TYP.).
The internal low-speed oscillation clock cannot be used as the CPU clock. The only hardware that operates with
the internal low-speed oscillation clock is the watchdog timer.
Oscillation is stopped when the watchdog timer stops.
Remarks 1. fSUB: Subsystem clock frequency
fIL: Internal low-speed oscillation clock frequency
2. The watchdog timer stops in the following cases.
• When bit 4 (WDTON) of an option byte (000C0H) = 0
• If the HALT or STOP instruction is executed when bit 4 (WDTON) of an option byte (000C0H) = 1 and
bit 0 (WDSTBYON) = 0
5.2 Configuration of Clock Generator
The clock generator includes the following hardware.
Item
Control registers
Oscillators
Table 5-1. Configuration of Clock Generator
Configuration
Clock operation mode control register (CMC)
Clock operation status control register (CSC)
Oscillation stabilization time counter status register (OSTC)
Oscillation stabilization time select register (OSTS)
System clock control register (CKC)
20 MHz internal high-speed oscillation control register (DSCCTL)
Peripheral enable registers 0 (PER0)
Operation speed mode control register (OSMC)
X1 oscillator
XT1 oscillator
Internal high-speed oscillator
Internal low-speed oscillator
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Jun 20, 2011