UPD78F1502AGK-GAK-AX Datasheet, PDF (838/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 24 LOW-VOLTAGE DETECTOR
Figure 24-10. Timing of Low-Voltage Detector Interrupt Signal Generation
(Bit: LVISEL = 1)
Input voltage from
external input pin (EXLVI)
VEXLVI
LVIMK flag
(set by software)
LVISEL flag
(set by software)
LVION flag
(set by software)
LVIF flag
INTLVI
Note 3
Note 3
<1>
Note 1
<7> Cleared by software
<2>
<3>
<4> Wait time
Note 2
<5>
LVIIF flag
LVIMD flag
(set by software) ^L
Note 2
<6>
Note 2 Cleared by software
Time
Notes 1.
2.
3.
The LVIMK flag is set to “1” by reset signal generation.
The interrupt request signal (INTLVI) is generated and the LVIF and LVIIF flags may be set (1).
If LVI operation is disabled when the input voltage of external input pin (EXLVI) is less than or equal to
the detection voltage (VEXLVI), an interrupt request signal (INTLVI) is generated and LVIIF may be set to 1.
Remark <1> to <7> in Figure 24-10 above correspond to <1> to <7> in the description of “When starting operation” in
24.4.2 (2) When detecting level of input voltage from external input pin (EXLVI).
R01UH0004EJ0501 Rev.5.01
822
Jun 20, 2011