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| UPD78F1502AGK-GAK-AX Datasheet, PDF (682/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers | |||
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Figure 16-1. Block Diagram of LCD Controller/Driver
LCD mode register
(LCDMD)
MDSET1 MDSET0
LCD clock control
register 0 (LCDC0)
LCD display mode
register (LCDM)
LCDC5 LCDC4 LCDC2 LCDC1 LCDC0 LCDON SCOC VLCON BLON LCDSEL LCDM2 LCDM1 LCDM0
Internal bus
LCD boost level control
register (VLCD)
VLCD4 VLCD3 VLCD2 VLCD1 VLCD0
00H
76543210
2
2
3
2
3
fSUB
fCLK/26
fCLK/27
fCLK/28
fLCD
Prescaler
fLCD fLCD fLCD fLCD fLCD fLCD
24 25 26 27 28 29
Clock genarator
for
capacitor split
Clock genarator
for voltage boost
VLCON
LCD
clock
LCDCL
selector
5
Timing
controller
INTRTC
76543210
selector
LCDON
Display data memory
03H
76543210
04H
76543210
76543210
selector
76543210
selector
LCDON
LCDON
Capacitor split Voltage boost
circuit
circuit
Segment voltage
controller
LCD drive voltage controller
Common voltage
controller
Common driver
Segment
driver
Segment
driver
Segment
driver
35H
76543210
76543210
selector
LCDON
Segment
driver
CAPH CAPL VLC2 VLC1 VLC0
COM0
COM3 COM4/
COM7/
SEG0
SEG3
SEG4
SEG53
Remark 78K0R/LF3: 31 segment signals (SEG0 to SEG30), 8 common signals (COM0 to COM7)
78K0R/LG3: 40 segment signals (SEG0 to SEG39), 8 common signals (COM0 to COM7)
78K0R/LH3: 54 segment signals (SEG0 to SEG53), 8 common signals (COM0 to COM7)
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