UPD78F1502AGK-GAK-AX Datasheet, PDF (762/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 19 INTERRUPT FUNCTIONS
19.3 Registers Controlling Interrupt Functions
The following 6 types of registers are used to control the interrupt functions.
• Interrupt request flag registers (IF0L, IF0H, IF1L, IF1H, IF2L, IF2H)
• Interrupt mask flag registers (MK0L, MK0H, MK1L, MK1H, MK2L, MK2H)
• Priority specification flag registers (PR00L, PR00H, PR01L, PR01H, PR02L, PR02H, PR10L, PR10H, PR11L,
PR11H, PR12L, PR12H)
• External interrupt rising edge enable registers (EGP0, EGP1)
• External interrupt falling edge enable registers (EGN0, EGN1)
• Program status word (PSW)
Table 19-2 shows a list of interrupt request flags, interrupt mask flags, and priority specification flags corresponding to
interrupt request sources.
Table 19-2. Flags Corresponding to Interrupt Request Sources (1/2)
LF3 LG3 LH3
Interrupt
Source
√ √ √ INTWDTI
√ √ √ INTLVI
√ √ √ INTP0
√ √ √ INTP1
√ √ √ INTP2
√ √ √ INTP3
√ √ √ INTP4
√ √ √ INTP5
√ √ √ INTST3
√ √ √ INTSR3
√ √ √ INTSRE3
√ √ √ INTDMA0
√ √ √ INTDMA1
−
√
√ INTST0 ^{Note 1}
−
√
√ INTCSI00 ^{Note 1}
−
√
√ INTSR0 ^{Note 2}
−
−
√ INTCSI01 ^{Note 2}
√ √ √ INTSRE0
Interrupt Request Flag
Interrupt Mask Flag
Priority Specification Flag
Register
Register
Register
WDTIIF
LVIIF
IF0L
WDTIMK
LVIMK
MK0L
WDTIPR0, WDTIPR1
LVIPR0, LVIPR1
PR00L,
PR10L
PIF0
PMK0
PPR00, PPR10
PIF1
PMK1
PPR01, PPR11
PIF2
PMK2
PPR02, PPR12
PIF3
PMK3
PPR03, PPR13
PIF4
PMK4
PPR04, PPR14
PIF5
PMK5
PPR05, PPR15
STIF3
SRIF3
IF0H
STMK3
SRMK3
MK0H
STPR03, STPR13
SRPR03, SRPR13
PR00H,
PR10H
SREIF3
SREMK3
SREPR03, SREPR13
DMAIF0
DMAMK0
DMAPR00, DMAPR10
DMAIF1
DMAMK1
DMAPR01, DMAPR11
STIF0 ^{Note 1}
STMK0 ^{Note 1}
STPR00, STPR10 ^{Note 1}
CSIIF00 ^{Note 1}
CSIMK00 ^{Note 1}
CSIPR000, CSIPR100 ^{Note 1}
SRIF0 ^{Note 2}
SRMK0 ^{Note 2}
SRPR00, SRPR10 ^{Note 2}
CSIIF01 ^{Note 2}
CSIMK01 ^{Note 2}
CSIPR001, CSIPR101 ^{Note 2}
SREIF0
SREMK0
SREPR00, SREPR10
Notes 1. Do not use UART0 and CSI00 at the same time because they share flags for the interrupt request sources.
If one of the interrupt sources INTST0 and INTCSI00 is generated, bit 5 of IF1H is set to 1. Bit 5 of MK0H,
PR00H, and PR10H supports these two interrupt sources.
2. Do not use UART0 and CSI01 at the same time because they share flags for the interrupt request sources.
If one of the interrupt sources INTSR0 and INTCSI01 is generated, bit 6 of IF0H is set to 1. Bit 6 of MK0H,
PR00H, and PR10H supports these two interrupt sources.
R01UH0004EJ0501 Rev.5.01
746
Jun 20, 2011