UPD78F1502AGK-GAK-AX Datasheet, PDF (71/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 2 PIN FUNCTIONS
2.2.13 P120 to P124
P120 function as an I/O port. P121 to P124 function as an input port. These pins also function as potential input for
external low-voltage detection, connecting resonator for main system clock, connecting resonator for subsystem clock,
external clock input for main system clock, and external interrupt request input.
<R>
P120/INTP0/EXLVI
P121/X1
P122/X2/EXCLK
P123/XT1
P124/XT2
78K0R/LF3
(80 pins: μ PD78F15x0A,
78F1501A, 78F15x2A)
78K0R/LG3
(100 pins: μ PD78F15x3A,
78F1504A, 78F15x5A)
√
√
√
√
√
78K0R/LH3
(128 pins: μ PD78F15x6A,
78F1507A, 78F15x8A)
The following operation modes can be specified in 1-bit units.
(1) Port mode
P120 functions as an I/O port. P120 can be set to input port or output port using port mode register 12 (PM12). Use
of an on-chip pull-up resistor can be specified by pull-up resistor option register 12 (PU12).
P121 to P124 function as an input port.
(2) Control mode
P120 to P124 function as potential input for external low-voltage detection, connecting resonator for main system
clock, connecting resonator for subsystem clock, external clock input for main system clock, and external interrupt
request input.
(a) EXLVI
This is a potential input pin for external low-voltage detection.
(b) X1, X2
These are the pins for connecting a resonator for main system clock.
(c) EXCLK
This is an external clock input pin for main system clock.
(d) XT1, XT2
These are the pins for connecting a resonator for subsystem clock.
(e) INTP0
This is an external interrupt request input pin for which the valid edge (rising edge, falling edge, or both rising and
falling edges) can be specified.
Caution The function setting on P121 to P124 is available only once after the reset release. The port once
set for connection to an oscillator cannot be used as an input port unless the reset is performed.
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011