UPD78F1502AGK-GAK-AX Datasheet, PDF (456/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
14.1.3 Simplified I²C (IIC10, IIC20)
This is a clocked communication function to communicate with two or more devices by using two lines: serial clock
(SCL) and serial data (SDA). This simplified I²C is designed for single communication with a device such as EEPROM,
flash memory, or A/D converter, and therefore, it functions only as a master and does not have a function to detect wait
states.
Make sure by using software, as well as operating the control registers, that the AC specifications of the start and stop
conditions are observed.
[Data transmission/reception]
• Master transmission, master reception (only master function with a single master)
• ACK output function^Note and ACK detection function
• Data length of 8 bits (When an address is transmitted, the address is specified by the higher 7 bits, and the least
significant bit is used for R/W control.)
• Manual generation of start condition and stop condition
[Interrupt function]
• Transfer end interrupt
[Error detection flag]
• Parity error (ACK error)
[Functions not supported by simplified I²C]
• Slave transmission, slave reception
• Arbitration loss detection function
• Wait detection functions
Note An ACK is not output when the last data is being received by writing 0 to the SOEmn (SOEm register) bit
and stopping the output of serial communication data. See 14.7.3 (2) Processing flow for details.
Remarks 1. To use an I²C bus of full function, see CHAPTER 15 SERIAL INTERFACE IICA.
2. m: Unit number (m = 0, 1), n: Channel number (n = 0, 2), mn = 02, 10
R01UH0004EJ0501 Rev.5.01
440
Jun 20, 2011