UPD78F1502AGK-GAK-AX Datasheet, PDF (172/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 4 PORT FUNCTIONS
4.2.9 Port 8
<R>
P80/SCK00/INTP11
P81/RxD0/SI00/INTP9
P82/TxD0/SO00
P83
P84/TO10/TI10
P85/TO11/TI11
P86/TO12/TI12
P87/TO13/TI13
78K0R/LF3
(80 pins: μ PD78F15x0A,
78F1501A, 78F15x2A)
−
−
−
−
−
−
−
−
78K0R/LG3
(100 pins: μ PD78F15x3A,
78F1504A, 78F15x5A)
√
√
√
−
−
−
−
−
78K0R/LH3
(128 pins: μ PD78F15x6A,
78F1507A, 78F15x8A)
√
√
√
√
√
√
√
√
Port 8 is an I/O port with an output latch. Port 8 can be set to the input mode or output mode in 1-bit units using port
mode register 8 (PM8). When the P80 to P87 pins are used as an input port, use of an on-chip pull-up resistor can be
specified in 1-bit units by pull-up resistor option register 8 (PU8).
Output from the P80 and P82 pins can be specified as N-ch open-drain output (VDD tolerance) in 1-bit units using port
output mode register 8 (POM8).
This port can also be used for serial interface clock I/O, data I/O, timer I/O, and external interrupt request input.
Reset signal generation sets port 8 to input mode.
Figures 4-20 to 4-24 show block diagrams of port 8.
Caution To use P80/SCK00/INTP11, P81/RxD0/SI00/INTP9, and P82/SO00/TxD0, as a general-purpose port,
note the serial array unit 0 setting. For details, refer to Table 14-5 Relationship Between Register
Settings and Pins (Channel 0 of unit 0: CSI00, UART0 Reception).
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011