UPD78F1502AGK-GAK-AX Datasheet, PDF (683/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 16 LCD CONTROLLER/DRIVER
16.3 Registers Controlling LCD Controller/Driver
The following seven registers are used to control the LCD controller/driver.
• LCD mode register (LCDMD)
• LCD display mode register (LCDM)
• LCD clock control register 0 (LCDC0)
• LCD boost level control register (VLCD)
• Port function register (PFALL)
• Segment enable register (SEGEN)
• Input switch control register (ISC)
(1) LCD mode register (LCDMD)
LCDMD sets the LCD drive voltage generator.
LCDMD is set using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets LCDMD to 00H.
Figure 16-2. Format of LCD Mode Register (LCDMD)
Address: FFF40H After reset: 00H R/W
Symbol
7
6
5
4
3
2
1
0
LCDMD
0
0
MDSET1
MDSET0
0
0
0
0
MDSET1
0
0
1
1
MDSET0
0
1
0
1
LCD drive voltage generator selection
External resistance division method
Internal voltage boosting method
Capacitor split method
Setting prohibited
Caution Bits 0 to 3, 6 and 7 must be set to 0.
(2) LCD display mode register (LCDM)
LCDM is a register that enables/disables display operation, enables/disables voltage boost circuit or capacitor
split circuit operation, and sets the display data area and the display mode.
LCDM is set using a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets LCDM to 00H.
R01UH0004EJ0501 Rev.5.01
667
Jun 20, 2011