UPD78F1502AGK-GAK-AX Datasheet, PDF (1026/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
APPENDIX D REVISION HISTORY
Edition
4th Edition
Description
Change of description of the wait time of the FSEL
Change of 5.4.3 Internal high-speed oscillator
Change of Figure 5-13. Clock Generator Operation When Power Supply Voltage
Is Turned On (When LVI Default Start Function Stopped Is Set (Option Byte:
LVIOFF = 1)) and Figure 5-14. Clock Generator Operation When Power Supply
Voltage Is Turned On (When LVI Default Start Function Enabled Is Set (Option
Byte: LVIOFF = 0))
Change of 5.6.5 CPU clock status transition diagram
(12/14)
Chapter
CHAPTER 5 CLOCK
GENERATOR
Change of 5.6.6 Condition before changing CPU clock and processing after
changing CPU clock
Change of 8.4.3 Setting window open period of watchdog timer
Deletion of TBD from operation stabilization time 1 μs of A/D voltage comparator
Change of voltage boost circuit stabilization time (TBD) to (10 μs)
CHAPTER 8
WATCHDOG TIMER
CHAPTER 10 A/D
CONVERTER
Addition of Note 4 to Table 10-2. A/D Conversion Time Selection
Deletion of TBD from the output impedance within 1 kΩ of the analog input source
Change of Table 10-8. Resistance and Capacitance Values of Equivalent Circuit
(Reference Values)
Change of wait time to 20 μs or more and deletion of TBD from the settling time (18
μs (MAX.))
Change of turn-on time (TBD) to 20 μs (MAX.)
Change of Caution 3 of Figure 14-8. Format of Serial Data Register mn
(SDRmn)
Change of Caution of 14.7.5 Calculating transfer rate
Addition of description to Caution of Figure 15-6. Format of IICA Control Register 0
(IICCTL0) (4/4)
Addition of description to Note of Figure 15-7. Format of IICA Status Register
(IICS) (2/3)
Addition of Note to Figure 15-9. Format of IICA Control Register 1 (IICCTL1)
(1/2)
Change of 15.4.2 Setting transfer clock by using IICWL and IICWH registers
Change of 15.6 Timing Charts
CHAPTER 11 D/A
CONVERTER
CHAPTER 12
OPERATIONAL
AMPLIFIER
CHAPTER 14 SERIAL
ARRAY UNIT
CHAPTER 15 SERIAL
INTERFACE IICA
R01UH0004EJ0501 Rev.5.01
Jun 20, 2011
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