UPD78F1502AGK-GAK-AX Datasheet, PDF (283/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
Figure 6-7. Format of Timer Mode Register mn (TMRmn) (4/4)
Operation mode
(Value set by the MDmn3 to MDmn1 bits
(see table above))
• Interval timer mode
(0, 0, 0)
• Capture mode
(0, 1, 0)
• Event counter mode
(0, 1, 1)
• One-count mode
(1, 0, 0)
• Capture & one-count mode
(1, 1, 0)
Other than above
MD
Setting of starting counting and interrupt
mn0
0 Timer interrupt is not generated when counting is started
(timer output does not change, either).
1 Timer interrupt is generated when counting is started
(timer output also changes).
0 Timer interrupt is not generated when counting is started
(timer output does not change, either).
0 Start trigger is invalid during counting operation.
At that time, interrupt is not generated, either.
1 Start trigger is valid during counting operation^Note.
At that time, interrupt is also generated.
0 Timer interrupt is not generated when counting is started
(timer output does not change, either).
Start trigger is invalid during counting operation.
At that time interrupt is not generated, either.
Setting prohibited
Note If the start trigger (TSmn = 1) is issued during operation, the counter is cleared, an interrupt is
generated, and recounting is started.
Remark mn: Unit number + Channel number
mn = 00 to 07, 10 to 13
R01UH0004EJ0501 Rev.5.01
267
Jun 20, 2011