UPD78F1502AGK-GAK-AX Datasheet, PDF (368/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 7 REAL-TIME COUNTER
(4) Real-time counter control register 2 (RTCC2)
The RTCC2 register is an 8-bit register that is used to control the interval interrupt function and the RTCDIV pin.
RTCC2 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 7-5. Format of Real-Time Counter Control Register 2 (RTCC2)
Address: FFF9FH After reset: 00H R/W
Symbol
<7>
<6>
<5>
4
RTCC2
RINTE
RCLOE2
RCKDIV
0
3
2
1
0
0
ICT2
ICT1
ICT0
RINTE
0
1
1
1
1
1
1
1
ICT2
×
0
0
0
0
1
1
1
ICT1
×
0
0
1
1
0
0
1
ICT0
×
0
1
0
1
0
1
×
Interval interrupt (INTRTCI) selection
Interval interrupt is not generated.
2⁶/fSUB (1.953125 ms)
2⁷/fSUB (3.90625 ms)
2⁸/fSUB (7.8125 ms)
2⁹/fSUB (15.625 ms)
2¹⁰/fSUB (31.25 ms)
2¹¹/fSUB (62.5 ms)
2¹²/fSUB (125 ms)
RCLOE2^Note
0
Disables output of RTCDIV pin
1
Enables output of RTCDIV pin
RTCDIV pin output control
RCKDIV
0
1
Selection of RTCDIV pin output frequency
RTCDIV pin outputs 512 Hz (1.95 ms).
RTCDIV pin outputs 16.384 kHz (0.061 ms).
Note RCLOE0 and RCLOE2 must not be enabled at the same time.
Cautions 1.
2.
3.
Change ICT2, ICT1, and ICT0 when RINTE = 0.
When the output from RTCDIV pin is stopped, the output continues after a maximum of two
clocks of fXT and enters the low level. While 512 Hz is output, and when the output is stopped
immediately after entering the high level, a pulse of at least one clock width of fSUB may be
generated.
After the real-time counter starts operating, the output width of the RTCDIV pin may be
shorter than as set during the first interval period.
Remark fSUB: Subsystem clock frequency
R01UH0004EJ0501 Rev.5.01
352
Jun 20, 2011