UPD78F1502AGK-GAK-AX Datasheet, PDF (131/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 3 CPU ARCHITECTURE
3.4.6 Register indirect addressing
[Function]
Register indirect addressing directly specifies the target addresses using the contents of the register pair specified
with the instruction word as an operand address.
[Operand format]
Identifier
−
−
Description
[DE], [HL] (only the space from F0000H to FFFFFH is specifiable)
ES:[DE], ES:[HL] (higher 4-bit addresses are specified by the ES register)
Figure 3-25. Example of [DE], [HL]
FFFFFH
OP code
rp
Target memory
F0000H
Memory
Figure 3-26. Example of ES:[DE], ES:[HL]
FFFFFH
OP code
ES
rp
Target memory
Memory
00000H
R01UH0004EJ0501 Rev.5.01
115
Jun 20, 2011