UPD78F1502AGK-GAK-AX Datasheet, PDF (582/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
Figure 14-99. Flowchart of Stop Condition Generation
Completion of data
transmission/data reception
Starting generation of stop condition.
Writing 1 to STmn bit to clear
SEmn to 0.
Writing 0 to SOEmn bit
Writing 0 to SOmn bit
Writing 1 to CKOmn bit
Wait
Writing 1 to SOmn bit
Secure a wait time so that the specifications of
I²C on the slave side are satisfied.
End of IIC communication
14.7.5 Calculating transfer rate
The transfer rate for simplified I²C (IIC10, IIC20) communication can be calculated by the following expressions.
(Transfer rate) = {Operation clock (MCK) frequency of target channel} ÷ (SDRmn[15:9] + 1) ÷ 2
Caution Setting SDRmn [15:9] = 0000000B is prohibited. Set SDRmn[15:9] to 0000001B or greater.
Remarks 1. The value of SDRmn[15:9] is the value of bits 15 to 9 of the SDRmn register (0000000B to
1111111B) and therefore is 0 to 127.
2. m: Unit number (m = 0, 1), n: Channel number (n = 0, 2)
The operation clock (MCK) is determined by serial clock select register m (SPSm) and bit 15 (CKSmn) of serial mode
register mn (SMRmn).
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011