UPD78F1502AGK-GAK-AX Datasheet, PDF (233/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 5 CLOCK GENERATOR
Remarks 1. fIH: Internal high-speed oscillation clock frequency
fIH20: 20 MHz Internal high-speed oscillation clock frequency
fMX: High-speed system clock frequency
fSUB Subsystem clock frequency
2. ×: don’t care
Cautions 1. The clock set by CSS, MCM0, SDIV, and MDIV2 to MDIV0 is supplied to the CPU and
peripheral hardware. If the CPU clock is changed, therefore, the clock supplied to
peripheral hardware (except the real-time counter, timer array unit (when fSUB/2, fSUB/4,
the valid edge of TI0mn input, or the valid edge of INTRTCI is selected as the count
clock), clock output/buzzer output, and watchdog timer) is also changed at the same
time. Consequently, stop each peripheral function when changing the
CPU/peripheral operating hardware clock.
2. If the peripheral hardware clock is used as the subsystem clock, the operations of
the A/D converter and IICA are not guaranteed. For the operating characteristics of
the peripheral hardware, refer to the chapters describing the various peripheral
hardware as well as CHAPTER 31 ELECTRICAL SPECIFICATIONS.
The fastest instruction can be executed in 1 clock of the CPU clock in the 78K0R/Lx3 microcontrollers. Therefore, the
relationship between the CPU clock (fCLK) and the minimum instruction execution time is as shown in Table 5-3.
Table 5-3. Relationship Between CPU Clock and Minimum Instruction Execution Time
CPU Clock
(Value set by the
SDIV, and MDIV2
to MDIV0 bits)
Minimum Instruction Execution Time: 1/fCLK
Main System Clock (CSS = 0)
High-Speed System Clock
(MCM0 = 1)
Internal High-Speed Oscillation
Clock (MCM0 = 0)
Subsystem Clock
(CSS = 1)
At 10 MHz
Operation
At 20 MHz
Operation
At 8 MHz (TYP.) At 20 MHz (TYP.) At 32.768 kHz Operation
Operation
Operation
fMAIN
0.1 μs
0.05 μs
0.125 μs (TYP.) 0.05 μs (TYP.)
−
fMAIN/2
0.2 μs
0.1 μs
0.25 μs (TYP.) 0.1 μs (TYP.)
−
(default)
fMAIN/2²
0.4 μs
0.2 μs
0.5 μs (TYP.)
0.2 μs (TYP.)
−
fMAIN/2³
0.8 μs
0.4 μs
1.0 μs (TYP.)
0.4 μs (TYP.)
−
fMAIN/2⁴
1.6 μs
0.8 μs
2.0 μs (TYP.)
0.8 μs (TYP.)
−
fMAIN/2⁵
3.2 μs
1.6 μs
4.0 μs (TYP.)
1.6 μs (TYP.)
−
fSUB
−
−
30.5 μs
fSUB/2
−
−
61 μs
Remark fMAIN: Main system clock frequency (fIH ,fIH20, or fMX)
fSUB: Subsystem clock frequency
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011