UPD78F1502AGK-GAK-AX Datasheet, PDF (580/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
Figure 14-97. Flowchart of Data Reception
Address field transmission completed
Writing 1 to STmn bit
Writing 0 to TXEmn bit, and 1 to RXEmn bit
Writing 1 to SSmn bit
Starting data reception
Last byte received?
No
Writing dummy data (FFH)
to SIOr (SDRmn[7:0])
Yes
Writing 0 to SOEmn bit
(Stopping output by serial
communication operation)
Transfer end interrupt
No
generated?
Yes
Reading SIOr (SDRmn[7:0])
No
Data transfer completed?
Yes
Data reception
completed
Stop condition generation
Caution ACK is also output when the last data is received. Communication is then completed by setting
“1” to the STmn bit to stop operation and generating a stop condition.
R01UH0004EJ0501 Rev.5.01
564
Jun 20, 2011