UPD78F1502AGK-GAK-AX Datasheet, PDF (235/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 5 CLOCK GENERATOR
(7) Peripheral enable register 0 (PER0)
This register is used to enable or disable use of each peripheral hardware macro. Clock supply to the hardware that
is not used is also stopped so as to decrease the power consumption and noise.
PER0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears theses registers to 00H.
Figure 5-8. Format of Peripheral Enable Register 0 (PER0) (1/2)
Address: F00F0H After reset: 00H R/W
Symbol
<7>
<6>
<5>
PER0
RTCEN DACEN ADCEN
<4>
IICAEN^{Note 1}
<3>
SAU1EN
<2>
SAU0EN
<1>
TAU1EN
<0>
TAU0EN
RTCEN
0
1
Control of real-time counter (RTC) input clock^{Note 2}
Stops input clock supply.
• SFR used by the real-time counter (RTC) cannot be written.
• The real-time counter (RTC) is in the reset status.
Supplies input clock.
• SFR used by the real-time counter (RTC) can be read and written.
DACEN
0
1
Control of D/A converter input clock
Stops input clock supply.
• SFR used by the D/A converter cannot be written.
• The D/A converter is in the reset status.
Supplies input clock.
• SFR used by the D/A converter can be read and written.
ADCEN
0
1
Control of A/D converter, operational amplifier, and voltage reference input clock
Stops input clock supply.
• SFR used by the A/D converter, operational amplifier, and voltage reference cannot be
written.
• The A/D converter, operational amplifier, and voltage reference is in the reset status.
Supplies input clock.
• SFR used by the A/D converter, operational amplifier, and voltage reference can be read
and written.
IICAEN
0
1
Control of serial interface IICA input clock
Stops input clock supply.
• SFR used by the serial interface IICA cannot be written.
• The serial interface IICA is in the reset status.
Supplies input clock.
• SFR used by the serial interface IICA can be read and written.
Notes 1.
2.
78K0R/LG3, 78K0R/LH3 only
By using RTCEN, can supply and stop the clock that is used when accessing the real-time
counter (RTC) from the CPU. RTCEN cannot control supply of the operating clock (fSUB) to
RTC.
R01UH0004EJ0501 Rev.5.01
219
Jun 20, 2011