UPD78F1502AGK-GAK-AX Datasheet, PDF (825/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 24 LOW-VOLTAGE DETECTOR
Cautions 2. Change the LVIS value with either of the following methods.
• When changing the value after stopping LVI
<1> Stop LVI (LVION = 0).
<2> Change the LVIS register.
<3> Set to the mode used as an interrupt (LVIMD = 0).
<4> Mask LVI interrupts (LVIMK = 1).
<5> Enable LVI operation (LVION = 1).
<6> Before cancelling the LVI interrupt mask (LVIMK = 0), clear it with software
because an LVIIF flag may be set when LVI operation is enabled.
• When changing the value after setting to the mode used as an interrupt (LVIMD = 0)
<1> Mask LVI interrupts (LVIMK = 1).
<2> Set to the mode used as an interrupt (LVIMD = 0).
<3> Change the LVIS register.
<4> Before cancelling the LVI interrupt mask (LVIMK = 0), clear it with software
because an LVIIF flag may be set when the LVIS register is changed.
3. When an input voltage from the external input pin (EXLVI) is detected, the detection
voltage (VEXLVI) is fixed. Therefore, setting of LVIS is not necessary.
(3) Port mode register 12 (PM12)
When using the P120/EXLVI/INTP0 pin for external low-voltage detection potential input, set PM120 to 1. At this time,
the output latch of P120 may be 0 or 1.
PM12 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to FFH.
Figure 24-4. Format of Port Mode Register 12 (PM12)
Address: FFF2CH After reset: FFH R/W
Symbol
7
6
5
4
3
2
1
PM12
1
1
1
1
1
1
1
0
PM120
PM120
0
1
P120 pin I/O mode selection
Output mode (output buffer on)
Input mode (output buffer off)
R01UH0004EJ0501 Rev.5.01
809
Jun 20, 2011