UPD78F1502AGK-GAK-AX Datasheet, PDF (243/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 5 CLOCK GENERATOR
5.5 Clock Generator Operation
The clock generator generates the following clocks and controls the operation modes of the CPU, such as standby
mode (see Figure 5-1).
• Main system clock fMAIN
• High-speed system clock fMX
X1 clock fX
External main system clock fEX
• Internal high-speed oscillation clock fIH
1 MHz internal high-speed oscillation clock fIH1
8 MHz internal high-speed oscillation clock fIH8
• 20 MHz internal high-speed oscillation clock fIH20
• Subsystem clock fSUB
• Subsystem selection clock fSUBC
• Internal low-speed oscillation clock fIL
• CPU/peripheral hardware clock fCLK
The CPU starts operation when the internal high-speed oscillator starts outputting after a reset release in the
78K0R/Lx3 microcontrollers, thus enabling the following.
(1) Enhancement of security function
When the X1 clock is set as the CPU clock by the default setting, the device cannot operate if the X1 clock is
damaged or badly connected and therefore does not operate after reset is released. However, the start clock of the
CPU is the internal high-speed oscillation clock, so the device can be started by the internal high-speed oscillation
clock after a reset release. As a result, reset sources can be detected by software and the minimum amount of safety
processing can be done during anomalies to ensure that the system terminates safely.
(2) Improvement of performance
Because the CPU can be started without waiting for the X1 clock oscillation stabilization time, the total performance
can be improved.
When the power supply voltage is turned on, the clock generator operation is shown in Figure 5-13 and Figure 5-14.
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011