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UPD78F1502AGK-GAK-AX Datasheet, PDF (236/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers
78K0R/Lx3
CHAPTER 5 CLOCK GENERATOR
Figure 5-8. Format of Peripheral Enable Register 0 (PER0) (2/2)
SAU1EN
0
1
Control of serial array unit 1 input clock
Stops input clock supply.
• SFR used by the serial array unit 1 cannot be written.
• The serial array unit is in the reset status.
Supplies input clock.
• SFR used by the serial array unit 1 can be read and written.
SAU0EN
0
1
Control of serial array unit 0 input clock
Stops input clock supply.
• SFR used by the serial array unit 0 cannot be written.
• The serial array unit 0 is in the reset status.
Supplies input clock.
• SFR used by the serial array unit 0 can be read and written.
TAU1EN
0
1
Control of timer array unit 1 input clock
Stops input clock supply.
• SFR used by timer array unit 1 cannot be written.
• Timer array unit 1 is in the reset status.
Supplies input clock.
• SFR used by timer array unit 1 can be read and written.
TAU0EN
0
1
Control of timer array unit 0 input clock
Stops input clock supply.
• SFR used by timer array unit 0 cannot be written.
• Timer array unit 0 is in the reset status.
Supplies input clock.
• SFR used by timer array unit 0 can be read and written.
R01UH0004EJ0501 Rev.5.01
220
Jun 20, 2011