UPD78F1502AGK-GAK-AX Datasheet, PDF (367/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 7 REAL-TIME COUNTER
Figure 7-4. Format of Real-Time Counter Control Register 1 (RTCC1) (2/2)
RIFG
Constant-period interrupt status flag
0
Constant-period interrupt is not generated.
1
Constant-period interrupt is generated.
This flag indicates the status of generation of the constant-period interrupt. When the constant-period interrupt is
generated, it is set to “1”.
This flag is cleared when “0” is written to it. Writing “1” to it is invalid.
RWST
Wait status flag of real-time counter
0
Counter is operating.
1
Mode to read or write counter value
This status flag indicates whether the setting of RWAIT is valid.
Before reading or writing the counter value, confirm that the value of this flag is 1.
RWAIT
Wait control of real-time counter
0
Sets counter operation.
1
Stops SEC to YEAR counters. Mode to read or write counter value
This bit controls the operation of the counter.
Be sure to write “1” to it to read or write the counter value.
Because RSUBC continues operation, complete reading or writing of it in 1 second, and clear this bit back to 0.
When RWAIT = 1, it takes up to 1 clock (32.768 kHz) until the counter value can be read or written.
If RSUBC overflows when RWAIT = 1, it counts up after RWAIT = 0. If the second count register is written,
however, it does not count up because RSUBC is cleared.
Caution If writing is performed to the RTCC1 register with a 1-bit manipulation instruction, the RIFG and
WAFG flags may be cleared. Therefore, to perform writing to the RIFG and WAFG flags, be sure
to use an 8-bit manipulation instruction. At this time, set 1 to the RIFG and WAFG flags to
invalidate writing and not to clear the RIFG and WAFG flags during writing. When the value may
be rewritten because the RIFG and WAFG flags are not being used, the RTCC1 register may be
written by using a 1-bit manipulation instruction.
Remark
Fixed-cycle interrupts and alarm match interrupts use the same interrupt source (INTRTC). When using
these two types of interrupts at the same time, which interrupt occurred can be judged by checking the
fixed-cycle interrupt status flag (RIFG) and the alarm detection status flag (WAFG) upon INTRTC
occurrence.
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011