UPD78F1502AGK-GAK-AX Datasheet, PDF (750/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 18 DMA CONTROLLER
Figure 18-11. Example of Setting for UART Consecutive Reception + ACK Transmission
Start
DEN0 = 1
INTSR0 interrupt routine
DSA0 = 12H
DRA0 = FE00H
DBC0 = 0040H
DMC0 = 00H
STG0 = 1
DMA0 transfer
Setting for UART reception
DST0 = 1
INTSR0 occurs.
User program
processing
INTDMA0
occurs.
DST0 = 0
P10 = 1
P10 = 0
RETI
DEN0 = 0^Note
RETI
End
Hardware operation
Note The DST0 flag is automatically cleared to 0 when a DMA transfer is completed.
Writing the DEN0 flag is enabled only when DST0 = 0. To terminate a DMA transfer without waiting for
occurrence of the interrupt of DMA0 (INTDMA0), set DST0 to 0 and then DEN0 to 0 (for details, refer to 18.5.7
Forced termination by software).
Remark
This is an example where a software trigger is used as a DMA start source.
If ACK is not transmitted and if only data is consecutively received from UART, the UART reception end
interrupt (INTSR0) can be used to start DMA for data reception.
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011