UPD78F1502AGK-GAK-AX Datasheet, PDF (500/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
(2) Operation procedure
Figure 14-33. Initial Setting Procedure for Master Reception
Starting initial setting
Setting PER0 register
Setting SPSm register
Release the serial array unit from the
reset status and start clock supply.
Set the prescaler.
Setting SMRmn register
Set an operation mode, etc.
Setting SCRmn register
Set a communication format.
Setting SDRmn register
Setting SOm register
Setting port
Writing to SSm register
Starting communication
Set a transfer baud rate.
Manipulate the CKOmn bit and set an
initial output level.
Enable clock output of the target channel
by setting a port register and a port mode
register.
Set the SSmn bit of the target channel to
1 to set SEmn = 1.
Set dummy data to the SIOp register (bits
7 to 0 of the SDRmn register) and start
communication.
Caution After setting the SAUmEN to 1, be sure to set the SPSm register after 4 or more clocks have
elapsed.
Figure 14-34. Procedure for Stopping Master Reception
Starting setting to stop
Setting STm register
Stopping communication
Write 1 to the STmn bit of the target
channel.
Stop communication in midway.
Remark Even after communication is stopped, the pin level is retained. To resume the operation, re-set the SOm
register (see Figure 14-35 Procedure for Resuming Master Reception).
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Jun 20, 2011