UPD78F1502AGK-GAK-AX Datasheet, PDF (293/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
• 78K0R/LG3
Address: FFF3EH
Figure 6-17. Format of Timer Input Select Registers 0, 1 (TIS0, TIS1) (2/2)
After reset: 00H R/W
Symbol
7
6
5
4
3
2
1
TIS0
TIS07
TIS06
TIS05
TIS04
TIS03
TIS02
TIS01
0
TIS00
Address: FFF4EH After reset: 00H R/W
Symbol
7
6
5
4
3
2
1
0
TIS1
0
0
RTCIS04 RTCIS00
0
0
0
0
• 78K0R/LH3
Address: FFF3EH After reset: 00H R/W
Symbol
7
6
5
TIS0
TIS07
TIS06
TIS05
4
TIS04
3
TIS03
2
TIS02
1
TIS01
0
TIS00
Address: FFF4EH After reset: 00H R/W
Symbol
7
6
5
TIS1
0
0
RTCIS04
4
RTCIS00
3
TIS13
2
TIS12
1
TIS11
0
TIS10
• Channels 1 to 3 and 5 to 7 of timer array unit 0 and channels 0 to 3 of timer array unit 1
TISpq
SDIV
Selection of Timer input used with channel (pq = 01, 02, 03, 05, 06, 07, 10, 11, 12, 13)
0
×
Input signal of timer input pin (TIpq)
1
0
fSUB/2
1
fSUB/4
• Channels 0 and 4 of timer array unit 0
TISpq
RTCISpq
0
×
1
0
1
SDIV
×
0
1
0
1
Selection of Timer input used with channel (pq = 00, 04)
Input signal of timer input pin (TIpq)
fSUB/2
fSUB/4
RTC Interval interrupt (INTRTCI)
Setting prohibited
Caution When the LIN-bus communication function is used, select the input signal of the RxD3 pin by
setting ISC1 to 1 and TIS07 = 0.
Remarks 1. pq: Unit number + Channel number (only for channels provided with timer I/O pins)
78K0R/LF3: pq = 00 to 04, 07
78K0R/LG3: pq = 00 to 07
78K0R/LH3: pq = 00 to 07, 10 to 13
2. ×: don’t care
3. fSUB: Subsystem select clock
4. SDIV: Bit 3 of the system clock control register (CKC)
R01UH0004EJ0501 Rev.5.01
277
Jun 20, 2011