UPD78F1502AGK-GAK-AX Datasheet, PDF (729/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 17 MULTIPLIER/DIVIDER
17.3 Register Controlling Multiplier/Divider
The multiplier/divider is controlled by using the multiplication/division control register (MDUC).
(1) Multiplication/division control register (MDUC)
MDUC is an 8-bit register that controls the operation of the multiplier/divider.
MDUC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 17-5. Format of Multiplication/Division Control Register (MDUC)
Address: F00E8H After reset: 00H R/W
Symbol
<7>
6
5
4
3
2
1
MDUC DIVMODE
0
0
0
0
0
0
<0>
DIVST
DIVMODE
Operation mode (multiplication/division) selection
0
Multiplication mode
1
Division mode
DIVST^Note
0
1
Division operation start/stop
Division operation processing complete
Starts division operation/division operation processing in progress
Note DIVST can only be set (1) in the division mode. In the division mode, division operation is started by setting
(1) DIVST. DIVST is automatically cleared (0) when the operation ends. In the multiplication mode,
operation is automatically started by setting the multiplier and multiplicand to MDAH and MDAL, respectively.
Cautions 1. Do not rewrite DIVMODE during operation processing (while DIVST is 1). If it is rewritten, the
operation result will be an undefined value.
2. DIVST cannot be cleared (0) by using software during division operation processing (while
DIVST is 1).
R01UH0004EJ0501 Rev.5.01
713
Jun 20, 2011