UPD78F1502AGK-GAK-AX Datasheet, PDF (248/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 5 CLOCK GENERATOR
5.6 Controlling Clock
5.6.1 Example of controlling high-speed system clock
The following two types of high-speed system clocks are available.
• X1 clock:
Crystal/ceramic resonator is connected to the X1 and X2 pins.
• External main system clock: External clock is input to the EXCLK pin.
When the high-speed system clock is not used, the X1/P121 and X2/EXCLK/P122 pins can be used as input port pins.
Caution The X1/P121 and X2/EXCLK/P122 pins are in the input port mode after a reset release.
The following describes examples of setting procedures for the following cases.
(1) When oscillating X1 clock
(2) When using external main system clock
(3) When using high-speed system clock as CPU/peripheral hardware clock
(4) When stopping high-speed system clock
(1) Example of setting procedure when oscillating the X1 clock
<1> Setting P121/X1 and P122/X2/EXCLK pins and setting oscillation frequency (CMC register)
• 2 MHz ≤ fX ≤ 10 MHz
EXCLK
0
OSCSEL
1
0
OSCSELS
0
0
0/1
0
AMPHS1 AMPHS0
0/1
0/1
AMPH
0
• 10 MHz < fX ≤ 20 MHz
EXCLK
0
OSCSEL
1
0
OSCSELS
0
0
0/1
0
AMPHS1 AMPHS0
0/1
0/1
AMPH
1
Remarks 1. fX: X1 clock oscillation frequency
2. For setting of the P123/XT1 and P124/XT2 pins, see 5.6.3
subsystem clock.
Example of controlling
<2> Controlling oscillation of X1 clock (CSC register)
If MSTOP is cleared to 0, the X1 oscillator starts oscillating.
<3> Waiting for the stabilization of the oscillation of X1 clock
Check the OSTC register and wait for the necessary time.
During the wait time, other software processing can be executed with the internal high-speed oscillation clock.
Cautions 1. The CMC register can be written only once after reset release, by an 8-bit memory
manipulation instruction.
Therefore, it is necessary to also set the value of the OSCSELS bit at the same time. For
OSCSELS bit, see 5.6.3 Example of controlling subsystem clock.
2. Set the X1 clock after the supply voltage has reached the operable voltage of the clock to be
used (see CHAPTER 31 ELECTRICAL SPECIFICATIONS).
R01UH0004EJ0501 Rev.5.01
232
Jun 20, 2011