UPD78F1502AGK-GAK-AX Datasheet, PDF (791/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 21 STANDBY FUNCTION
(2) Oscillation stabilization time select register (OSTS)
This register is used to select the X1 clock oscillation stabilization wait time when the STOP mode is released.
When the X1 clock is selected as the CPU clock, the operation waits for the time set using OSTS after the STOP
mode is released.
When the internal high-speed oscillation clock is selected as the CPU clock, confirm with OSTC that the desired
oscillation stabilization time has elapsed after the STOP mode is released. The oscillation stabilization time can be
checked up to the time set using OSTC.
OSTS can be set by an 8-bit memory manipulation instruction.
Reset signal generation sets this register to 07H.
Figure 21-2. Format of Oscillation Stabilization Time Select Register (OSTS)
Address: FFFA3H After reset: 07H R/W
Symbol
7
6
5
4
3
2
1
0
OSTS
0
0
0
0
0
OSTS2
OSTS1
OSTS0
OSTS2
OSTS1
OSTS0
Oscillation stabilization time selection
0
0
0
2⁸/fX
0
0
1
2⁹/fX
0
1
0
2¹⁰/fX
0
1
1
2¹¹/fX
1
0
0
2¹³/fX
1
0
1
2¹⁵/fX
1
1
0
2¹⁷/fX
1
1
1
2¹⁸/fX
fX = 10 MHz
25.6 μs
51.2 μs
102.4 μs
204.8 μs
819.2 μs
3.27 ms
13.11 ms
26.21 ms
fX = 20 MHz
Setting prohibited
25.6 μs
51.2 μs
102.4 μs
409.6 μs
1.64 ms
6.55 ms
13.11 ms
Cautions 1. To set the STOP mode when the X1 clock is used as the CPU clock, set OSTS before executing
the STOP instruction.
2. Setting the oscillation stabilization time to 20 μs or less is prohibited.
3. Before changing the setting of the OSTS register, confirm that the count operation of the OSTC
register is completed.
4. Do not change the value of the OSTS register during the X1 clock oscillation stabilization time.
5. The oscillation stabilization time counter counts up to the oscillation stabilization time set by
OSTS. If the STOP mode is entered and then released while the internal high-speed oscillation
clock is being used as the CPU clock, set the oscillation stabilization time as follows.
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time set by OSTS
Note, therefore, that only the status up to the oscillation stabilization time set by OSTS is set to
OSTC after STOP mode is released.
6. The X1 clock oscillation stabilization wait time does not include the time until clock oscillation
starts (“a” below).
STOP mode release
X1 pin voltage
waveform
a
Remark fX: X1 clock oscillation frequency
R01UH0004EJ0501 Rev.5.01
775
Jun 20, 2011