UPD78F1502AGK-GAK-AX Datasheet, PDF (934/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 31 ELECTRICAL SPECIFICATIONS
(2) Serial interface: Serial array unit (17/18)
(TA = −40 to +85°C, 2.7 V ≤ VDD = EVDD ≤ 5.5 V, VSS = EVSS = AVss = 0 V)
(h) Communication at different potential (2.5 V, 3 V) (simplified I²C mode)
Parameter
Symbol
Conditions
MIN.
MAX.
Unit
SCLr clock frequency
Hold time when SCLr = “L”
Hold time when SCLr = “H”
Data setup time (reception)
Data hold time (transmission)
fSCL
4.0 V ≤ VDD = EVDD ≤ 5.5 V,
400
kHz
2.7 V ≤ Vb ≤ 4.0 V,
Rb = 1.4 kΩ, Cb = 100 pF
2.7 V ≤ VDD = EVDD < 4.0 V,
400
kHz
2.3 V ≤ Vb < 2.7 V,
Rb = 2.7 kΩ, Cb = 100 Pf
tLOW
4.0 V ≤ VDD = EVDD ≤ 5.5 V,
1275
ns
2.7 V ≤ Vb ≤ 4.0 V,
Rb = 1.4 kΩ, Cb = 100 pF
2.7 V ≤ VDD = EVDD < 4.0 V,
1275
ns
2.3 V ≤ Vb < 2.7 V,
Rb = 2.7 kΩ, Cb = 100 pF,
tHIGH
4.0 V ≤ VDD = EVDD ≤ 5.5 V,
655
ns
2.7 V ≤ Vb ≤ 4.0 V,
Rb = 1.4 kΩ, Cb = 100 pF
2.7 V ≤ VDD = EVDD < 4.0 V,
655
ns
2.3 V ≤ Vb < 2.7 V,
Rb = 2.7 kΩ, Cb = 100 pF
tSU:DAT
4.0 V ≤ VDD = EVDD ≤ 5.5 V, 1/fMCK + 190
ns
2.7 V ≤ Vb ≤ 4.0 V,
Rb = 1.4 kΩ, Cb = 100 pF
2.7 V ≤ VDD = EVDD < 4.0 V, 1/fMCK + 190
ns
2.3 V ≤ Vb < 2.7 V,
Rb = 2.7 kΩ, Cb = 100 pF
tHD:DAT
4.0 V ≤ VDD = EVDD ≤ 5.5 V,
0
640
ns
2.7 V ≤ Vb ≤ 4.0 V,
Rb = 1.4 kΩ, Cb = 100 pF
2.7 V ≤ VDD = EVDD < 4.0 V,
0
660
ns
2.3 V ≤ Vb < 2.7 V,
Rb = 2.7 kΩ, Cb = 100 pF
Caution Select the TTL input buffer and the N-ch open drain output (VDD tolerance) mode for SDAr and the N-ch
open drain output (VDD tolerance) mode for SCLr by using the PIMg and POMx registers.
Remarks 1.
2.
3.
4.
Rb[Ω]:Communication line (SDAr, SCLr) pull-up resistance,
Cb[F]: Communication line (SDAr, SCLr) load capacitance, Vb[V]: Communication line voltage
r: IIC number (r = 10, 20), g: PIM number (g = 1, 7), x: POM number (x = 1, 7, 8)
fMCK: Serial array unit operation clock frequency
(Operation clock to be set by the CKSmn bit of the SMRmn register. m: Unit number (m = 0, 1),
n: Channel number (n = 0, 2), mn = 02, 10)
VIH and VIL below are observation points for the AC characteristics of the serial array unit when
communicating at different potentials in simplified I²C mode mode.
4.0 V ≤ VDD = EVDD ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V: VIH = 2.2 V, VIL = 0.8 V
2.7 V ≤ VDD = EVDD < 4.0 V, 2.3 V ≤ Vb < 2.7 V: VIH = 2.0 V, VIL = 0.5 V
R01UH0004EJ0501 Rev.5.01
918
Jun 20, 2011