UPD78F1502AGK-GAK-AX Datasheet, PDF (942/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 31 ELECTRICAL SPECIFICATIONS
LCD Characteristics (2/4)
(2) Internal voltage boosting method (1/2)
(a) 1/3 bias method (TA = −40 to +85°C, 1.8 V ≤ VDD = EVDD ≤ 5.5 V, VSS = EVSS = 0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
LCD output voltage variation range VLCD2
C1 to C4^{Note 1}
= 0.47 μF^{Note 2}
VLCD = 00H
VLCD = 01H
1.67
1.62
1.75
1.70
1.83
V
1.78
V
VLCD = 02H
1.57
1.65
1.73
V
VLCD = 03H
1.52
1.60
1.68
V
VLCD = 04H
1.47
1.55
1.63
V
VLCD = 05H
1.42
1.50
1.58
V
VLCD = 06H
1.37
1.45
1.53
V
VLCD = 07H
1.32
1.40
1.48
V
VLCD = 08H
1.27
1.35
1.43
V
VLCD = 09H
1.22
1.30
1.375
V
VLCD = 0AH
1.17
1.25
1.33
V
VLCD = 0BH
1.12
1.20
1.28
V
VLCD = 0CH
1.07
1.15
1.23
V
VLCD = 0DH
1.02
1.10
1.18
V
VLCD = 0EH
0.97
1.05
1.13
V
VLCD = 0FH
0.92
1.00
1.08
V
VLCD = 10H
0.87
0.95
1.03
V
VLCD = 11H
0.82
0.90
0.98
V
VLCD = 12H
0.77
0.85
0.93
V
VLCD = 13H
0.72
0.80
0.88
V
Doubler output voltage
VLCD1
C1 to C4^{Note 1} = 0.47 μF
2 VLCD2
2 VLCD2
2 VLCD2
V
−0.1
Tripler output voltage
VLCD0
C1 to C4^{Note 1} = 0.47 μF
3 VLCD2
3 VLCD2
3 VLCD2
V
−0.15
Reference voltage setup time ^{Note 2}
Voltage boost wait time^{Note 3}
tVAWAIT2
tVAWAIT1
2
ms
500
ms
LCD output resistor^{Note 4} (Common)
LCD output resistor^{Note 4} (Segment)
RODC
ROCS
VDD > VLC0
IO = ±5 μA
IO = ±1 μA
5
s
40
kΩ
200
kΩ
Notes 1. This is a capacitor that is connected between voltage pins used to drive the LCD.
C1: A capacitor connected between CAPH and CAPL
C2: A capacitor connected between VLC0 and GND
C3: A capacitor connected between VLC1 and GND
C4: A capacitor connected between VLC2 and GND
C1 = C2 = C3 = C4 = 0.47 pF±30 %
2. This is the required wait time from when the reference voltage is specified by using the LVCD register (or the
register is reset to use the default value of the reference voltage) until voltage boosting is started (VLCON = 1).
3. This is the wait time from when voltage boosting is started (VLCON = 1) until display is enabled (LCDON = 1).
4. The output resistor is a resistor connected between one of the VLC0, VLC1, VLC2 and VSS pins, and either of the
SEG and COM pins.
R01UH0004EJ0501 Rev.5.01
926
Jun 20, 2011