UPD78F1502AGK-GAK-AX Datasheet, PDF (1001/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
Function
Details of
Function
APPENDIX C LIST OF CAUTIONS
Cautions
(29/39)
Page
Interrupt
functions
IF0L, IF0H, IF1L, When manipulating a flag of the interrupt request flag register, use a 1-bit memory p.748 _†
IF1H, IF2L, IF2H: manipulation instruction (CLR1). When describing in C language, use a bit
Interrupt request manipulation instruction such as “IF0L.0 = 0;” or “_asm(“clr1 IF0L, 0”);” because the
flag registers
compiled assembler must be a 1-bit memory manipulation instruction (CLR1).
If a program is described in C language using an 8-bit memory manipulation
instruction such as “IF0L &= 0xfe;” and compiled, it becomes the assembler of three
instructions.
mov a, IF0L
and a, #0FEH
mov IF0L, a
In this case, even if the request flag of another bit of the same interrupt request flag
register (IF0L) is set to 1 at the timing between “mov a, IF0L” and “mov IF0L, a”, the
flag is cleared to 0 at “mov IF0L, a”. Therefore, care must be exercised when using
an 8-bit memory manipulation instruction in C language.
Be sure to clear bits 5, 6 of IF0H, bit 3 of IF1L, bit 3 of IF1H, bits 5 to 7 of IF2L, bits 0, p.749 _†
6, 7 of IF2H to 0. (78K0R/LF3)
Be sure to clear bit 3 of IF1H, bits 6, 7 of IF2H to 0. (78K0R/LG3)
p.750 _†
Be sure to clear bits 6, 7 of IF2H to 0. (78K0R/LH3)
p.751 _†
MK0L, MK0H, Be sure to set bits 5, 6 of MK0H, bit 3 of MK1L, bit 3 of MK1H, bits 5 to 7 of MK2L, p.752 _†
MK1L, MK1H, bits 0, 6, 7 of MK2H to 1. (78K0R/LF3)
MK2L, MK2H: Be sure to set bit 3 of MK1H, bits 6, 7 of MK2H to 1. (78K0R/LG3)
p.753 _†
Interrupt mask _{Be sure to set bits 6, 7 of MK2H to 1. (78K0R/LH3)}
p.754 _†
flag registers
PR00L, PR00H, Be sure to set bits 5, 6 of PR00H and PR10H, bit 3 of PR01L and PR11L to 1. p.755 _†
PR01L, PR01H, (78K0R/LF3)
PR02L, PR02H, Be sure to set bit 3 of PR01H and PR11H, bits 5 to 7 of PR02L and PR12L, bits 0, 6, p.756 _†
PR10L, PR10H, 7 of PR02H and PR12H to 1. (78K0R/LF3)
PR11L, PR11H, _{Be sure to set bit 3 of PR01H and PR11H, bits 6, 7 of PR02H and PR12H to 1. p.757 †}
PR12L, PR12H: _(78K0R/LG3)
Priority
Be sure to set bits 6, 7 of PR02H and PR12H to 1. (78K0R/LH3)
specification flag
p.758 _†
registers
EGP0, EGP1: Select the port mode by clearing EGPn and EGNn to 0 because an edge may be p.762 _†
External
detected when the external interrupt function is switched to the port function.
interrupt rising
edge enable
registers, EGN0,
EGN1: External
interrupt falling
edge enable
registers
Software
Do not use the RETI instruction for restoring from the software interrupt.
p.766 _†
interrupt request
acknowledgment
BRK instruction The BRK instruction is not one of the above-listed interrupt request hold instructions. p.770 _†
However, the software interrupt activated by executing the BRK instruction causes
the IE flag to be cleared. Therefore, even if a maskable interrupt request is
generated during execution of the BRK instruction, the interrupt request is not
acknowledged.
R01UH0004EJ0501 Rev.5.01
985
Jun 20, 2011