UPD78F1502AGK-GAK-AX Datasheet, PDF (80/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 2 PIN FUNCTIONS
<R>
<R>
Table 2-3. Connection of Unused Pins (78K0R/LG3) (2/3)
Pin Name
I/O Circuit Type
I/O
Recommended Connection of Unused Pins
P50/SEG39/RxD3
P51/SEG38/TxD3
P52/SEG37/TI02
P53/SEG36/TI04
P54/SEG35 to P57/SEG32
17-Q
17-P
17-Q
17-P
I/O
<When setting to port I/O>
Input: Independently connect to EVDD or EVSS via a resistor.
Output: Leave open.
<When setting to segment output>
Leave open.
P60/SCL0
P61/SDA0
13-R
Input: Independently connect to EVDD or EVSS via a resistor.
Output: Leave open.
P80/SCK00/INTP11
8-R
P81/RxD0/SI00/INTP9
P82/SO00/TxD0
5-AG
P90/SEG31 to P97/SEG24
P100/SEG15
17-P
<When setting to port I/O>
Input: Independently connect to EVDD or EVSS via a resistor.
Output: Leave open.
<When setting to segment output>
Leave open.
P110/ANO0 ^{Note 1},
P111/ANO1 ^{Note 1}
P120/INTP0/EXLVI
P121/X1^{Note 3}
P122/X2/EXCLK^{Note 3}
P123/XT1^{Note 3}
P124/XT2^{Note 3}
12-A
8-R
37-C
37-A
Input
Input: Independently connect to AVDD1 or AVSS via a resistor.
Output: Leave open.
Input: Independently connect to EVDD or EVSS via a resistor.
Output: Leave open.
Independently connect to EVDD or EVSS via a resistor.
P130
3-C
Output Leave open.
P140/SEG23 to P147/SEG16 17-P
I/O
<When setting to port I/O>
Input: Independently connect to EVDD or EVSS via a resistor.
Output: Leave open.
<When setting to segment output>
Leave open.
Notes 1.
2.
3.
ANOx and AVREFM apply to μ PD78F150xA only.
μ PD78F151xA corresponds to type 5.
Use recommended connection above in input port mode (see Figure 5-2 Format of Clock Operation Mode
Control Register (CMC)) when these pins are not used.
R01UH0004EJ0501 Rev.5.01
64
Jun 20, 2011