UPD78F1502AGK-GAK-AX Datasheet, PDF (111/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 3 CPU ARCHITECTURE
<R>
<R>
<R>
<R>
Address
Table 3-5. SFR List (2/5)
Special Function Register (SFR) Name
Symbol
R/W Manipulable Bit
Range
1-bit 8-bit 16-bit
After
Reset
FFF28H Port mode register 8
FFF29H Port mode register 9
FFF2AH Port mode register 10
FFF2BH Port mode register 11
PM8
PM9
PM10
PM11
R/W √
√
R/W √
√
R/W √
√
R/W √
√
FFF2CH Port mode register 12
PM12
R/W √
√
FFF2EH Port mode register 14
PM14
R/W √
√
FFF2FH Port mode register 15
PM15
R/W √
√
FFF30H A/D converter mode register
ADM
R/W √
√
FFF31H Analog input channel specification register
ADS
R/W √
√
FFF32H A/D converter mode register 1
ADM1
R/W √
√
FFF33H Operational amplifier control register ^Note
OAC
R/W √
√
FFF36H Analog reference voltage control register
ADVRC
R/W √
√
FFF37H Key return mode register
KRM
R/W √
√
FFF38H External interrupt rising edge enable register 0 EGP0
R/W √
√
FFF39H External interrupt falling edge enable register 0 EGN0
R/W √
√
FFF3AH External interrupt rising edge enable register 1 EGP1
R/W √
√
FFF3BH External interrupt falling edge enable register 1 EGN1
R/W √
√
FFF3CH Input switch control register
ISC
R/W √
√
FFF3EH Timer input select register 0
TIS0
R/W √
√
FFF3FH Timer input select register 1
TIS1
R/W √
√
FFF40H LCD mode register
LCDMD
R/W √
√
FFF41H LCD display mode register
LCDM
R/W √
√
FFF42H LCD clock control register 0
LCDC0
R/W √
√
FFF43H LCD boost level control register
VLCD
R/W √
√
FFF44H Serial data register 02
TXD1/ SDR02 R/W −
√
SIO10
FFF45H
−
−
−
FFF46H Serial data register 03
RXD1 SDR03 R/W −
√
FFF47H
−
−
−
FFF48H Serial data register 10
TXD2/ SDR10 R/W −
√
SIO20
FFF49H
−
−
−
FFF4AH Serial data register 11
RXD2 SDR11 R/W −
√
FFF4BH
−
−
−
FFF50H IICA shift register
IICA
R/W −
√
FFF51H IICA status register
IICS
R√
√
FFF52H IICA flag register
IICF
R/W √
√
FFF58H D/A D/A conversion value setting register 0 ^Note _{DACS0 DACS R/W −}
√
FFF59H conversion value setting register W0 ^Note
− W0 R/W −
−
FFF5AH D/A ^{D/A conversion value setting register 1 Note} DACS1 DACS R/W −
√
FFF5BH conversion value setting register W1 ^Note
− W1 R/W −
−
Note Dedicated to μ PD78F150xA.
−
FFH − √ √
−
FFH √ √ √
−
FFH √ √ √
−
FFH √ √ √
−
FFH √ √ √
−
FEH √ √ √
−
FFH √ √ √
−
00H √ √ √
−
00H √ √ √
−
00H √ √ √
−
00H √ √ √
−
00H √ √ √
−
00H − − √
−
00H √ √ √
−
00H √ √ √
−
00H − √ √
−
00H − √ √
−
00H √ √ √
−
00H √ √ √
−
00H √ √ √
−
00H √ √ √
−
00H √ √ √
−
00H √ √ √
−
0FH √ √ √
√ 0000H √ √ √
√√√
√ 0000H √ √ √
√√√
√ 0000H √ √ √
√√√
√ 0000H √ √ √
√√√
−
00H − √ √
−
00H − √ √
−
00H − √ √
−
00H √ √ √
√ 0000H √ √ √
−
00H √ √ √
√ 0000H √ √ √
R01UH0004EJ0501 Rev.5.01
95
Jun 20, 2011