UPD78F1502AGK-GAK-AX Datasheet, PDF (587/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
14.9 Relationship Between Register Settings and Pins
Tables 14-5 to 14-12 show the relationship between register settings and pins for each channel of serial array units 0
and 1.
Table 14-5. Relationship between register settings and pins (Channel 0 of unit 0: CSI00, UART0 transmission)
SE MD MD SOE SO CKO TXE RXE PM P80 PM P81 PM P82
00 002 001 00 00 00 00 00 80
Note2
81
82
Note1
Note2
Operation mode
Pin Function
SCK00/
INTP11
/P80
SI00/RxD0/
INTP9/
P81 ^Note2
SO00/
TxD0/P82
0 00
01
1 00
01
011 0
011 0
1 0/1 1 1
Note4
1 0/1 1 1
Note4
0 1 0/1 0
Note4
1 0/1 0/1 1
Note4 Note4
1 0/1 0/1 1
Note4 Note4
1 0/1 1 1
Note4
0× × × ×××
Note3 Note3 Note3 Note3 Note3 Note3
Operation stop
mode
INTP11/
P80
INTP9/P81
RxD0/
INTP9/P81
1 1×1×××
Slave CSI00
Note3 Note3
reception
SCK00
(input)
SI00
0 1×× ×01
Note3 Note3
Slave CSI00
transmission
SCK00 INTP9/P81
(input)
11×1×01
Slave CSI00
transmission/
reception
SCK00
(input)
SI00
1 0 1 1 × × × Master CSI00 SCK00
Note3 Note3
reception
(output)
SI00
0 01×× 0 1
Note3 Note3
Master CSI00
transmission
SCK00 INTP9/P81
(output)
1 011× 0 1
Master CSI00
transmission/
reception
SCK00
(output)
SI00
0××××0
Note3 Note3 Note3 Note3
1
UART0
INTP11/ RxD0/
transmission^Note5 P80 INTP9/P81
P82
P82
SO00
SO00
P82
SO00
SO00
TxD0
Notes 1. The SE0 register is a read-only status register which is set using the SS0 and ST0 registers.
2. When channel 1 of unit 0 is set to UART0 reception, this pin becomes an RxD0 function pin (refer to Table 14-6).
In this case, operation stop mode or UART0 transmission must be selected for channel 0 of unit 0.
3. This pin can be set as a port function pin.
4. This is 0 or 1, depending on the communication operation. For details, refer to 14.3 (12) Serial output register
m (SOm).
5. When using UART0 transmission and reception in a pair, set channel 1 of unit 0 to UART0 reception (refer to
Table 14-6).
Remarks 1. X: Don’t care
2. For 78K0R/LF3, the channel 0 of unit 0 is not mounted.
R01UH0004EJ0501 Rev.5.01
571
Jun 20, 2011