UPD78F1502AGK-GAK-AX Datasheet, PDF (560/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
LIN Bus
Figure 14-84. Reception Operation of LIN
Wakeup signal
frame
Sync break
field
Sync field Identification Data filed Data filed Checksum
field
field
RXD3 (input)
Disable
Enable
13-bit SBF
reception
<2>
SF
reception
ID
reception
Data
reception
Data
reception
Data
reception
<5>
Reception interrupt
(INTSR3)
<1>
Edge detection
(INTP0)
Capture
timer
<3>
Disable
<4>
Enable
Here is the flow of signal processing.
<1> The wakeup signal is detected by detecting an interrupt edge (INTP0) on a pin. When the wakeup signal is
detected, enable reception of UART3 (RXE13 = 1) and wait for SBF reception.
<2> When the start bit of SBF is detected, reception is started and serial data is sequentially stored in the RXD3
register (= bits 7 to 0 of the serial data register 13 (SDR13)) at the set baud rate. When the stop bit is detected,
the reception end interrupt request (INTSR3) is generated. When data of low levels of 11 bits or more is detected
as SBF, it is judged that SBF reception has been correctly completed. If data of low levels of less than 11 bits is
detected as SBF, it is judged that an SBF reception error has occurred, and the system returns to the SBF
reception wait status.
<3> When SBF reception has been correctly completed, start channel 7 of the timer array unit and measure the bit
interval (pulse width) of the sync field (see 6.7.5 Operation as input signal high-/low-level width
measurement).
<4> Calculate a baud rate error from the bit interval of sync field (SF). Stop UART3 once and adjust (re-set) the baud
rate.
<5> The checksum field should be distinguished by software. In addition, processing to initialize UART3 after the
checksum field is received and to wait for reception of SBF should also be performed by software.
R01UH0004EJ0501 Rev.5.01
544
Jun 20, 2011