UPD78F1502AGK-GAK-AX Datasheet, PDF (612/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 15 SERIAL INTERFACE IICA
15.4 I²C Bus Mode Functions
15.4.1 Pin configuration
The serial clock pin (SCL0) and serial data bus pin (SDA0) are configured as follows.
(1) SCL0....... This pin is used for serial clock input and output.
This pin is an N-ch open-drain output for both master and slave devices. Input is Schmitt input.
(2) SDA0 ...... This pin is used for serial data input and output.
This pin is an N-ch open-drain output for both master and slave devices. Input is Schmitt input.
Since outputs from the serial clock line and the serial data bus line are N-ch open-drain outputs, an external pull-up
resistor is required.
Figure 15-13. Pin Configuration Diagram
VDD
Slave device
Master device
Clock output
VSS
(Clock input)
Data output
VSS
Data input
SCL0
VDD
SCL0
SDA0
SDA0
(Clock output)
VSS
Clock input
Data output
VSS
Data input
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011