UPD78F1502AGK-GAK-AX Datasheet, PDF (968/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
APPENDIX B REGISTER INDEX
B.2 Register Index (In Alphabetical Order with Respect to Register Symbol)
A
ADCR: 12-bit A/D conversion result register ...................................................................................................... 389, 396
ADCRH: 8-bit A/D conversion result register...................................................................................................... 389, 397
ADM: A/D converter mode register............................................................................................................................. 391
ADM1: A/D converter mode register 1........................................................................................................................ 394
ADPC: A/D port configuration register........................................................................................................ 193, 399, 429
ADS: Analog input channel specification register ....................................................................................................... 398
ADVRC: Analog reference voltage control register ............................................................................................ 395, 435
ALARMWH: Alarm hour register................................................................................................................................. 359
ALARMWM: Alarm minute register............................................................................................................................. 359
ALARMWW: Alarm week register............................................................................................................................... 360
B
BCDADJ: BCD correction result register .................................................................................................................... 854
BECTL: Background event control register ................................................................................................................ 839
C
CKC: System clock control register ............................................................................................................................ 216
CKS0: Clock output selection register 0 ..................................................................................................................... 382
CKS1: Clock output selection register 1 ..................................................................................................................... 382
CMC: Clock operation mode control register.............................................................................................................. 209
CSC: Clock operation status control register.............................................................................................................. 211
D
DACS0: D/A conversion value setting register 0 ........................................................................................................ 422
DACS1: D/A conversion value setting register 1 ........................................................................................................ 422
DACSW0: D/A conversion value setting register W0 ................................................................................................. 422
DACSW1: D/A conversion value setting register W1 ................................................................................................. 422
DAM: D/A converter mode register............................................................................................................................. 421
DAY: Day count register............................................................................................................................................. 355
DBCn: DMA byte count register n .............................................................................................................................. 720
DMCn: DMA mode control register n.......................................................................................................................... 721
DSCCTL: 20 MHz internal high-speed oscillation control register ............................................................................. 218
DRAn: DMA RAM address register n ......................................................................................................................... 719
DRCn: DMA operation control register n .................................................................................................................... 723
DSAn: DMA SFR address register n .......................................................................................................................... 718
E
EGN0: External interrupt falling edge enable register ................................................................................................ 760
EGN1: External interrupt falling edge enable register ................................................................................................ 760
EGP0: External interrupt rising edge enable register ................................................................................................. 760
EGP1: External interrupt rising edge enable register ................................................................................................. 760
H
HOUR: Hour count register ........................................................................................................................................ 354
I
IF0H: Interrupt request flag register 0H ...................................................................................................................... 748
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011