UPD78F1502AGK-GAK-AX Datasheet, PDF (439/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 11 D/A CONVERTER (μ PD78F150xA only)
11.4 Operation of D/A Converter
11.4.1 Operation in normal mode
D/A conversion is performed using write operation to the DACSn register as the trigger.
described below.
The setting method is
<1> Set bit 6 (DACEN) of peripheral enable register 0 (PER0) to 1 to start the supply of the input clock to the D/A
converter.
<2> Set the DAMDn bit of the D/A converter mode register (DAM) to 0 (normal mode).
<3> Use the bit 6 (DAREF) of the DAM register to select the D/A converter reference voltage supply on the positive
side.
<4> Use the DARESn bit of the DAM register to select the resolution of the D/A converter.
<5> Set the analog voltage value to be output to the ANOn pin to the D/A conversion value setting register Wn
(DACSWn) or D/A conversion value setting register n (DACSn).
Steps <1> and <5> above constitute the initial settings.
<6> Set the DACEn bit of the DAM register to 1 (D/A conversion enable).
After the wait time (20 μs or more) elapses, D/A conversion starts, and then, after the settling time (18 μs (max.))
elapses, the D/A converted analog voltage value is output from the ANOn pin.
<7> To perform subsequent D/A conversions, write to the DACSWn or DACSn register.
The previous D/A conversion result is held until the next D/A conversion is performed.
When the DACEn bit of the DAM register is set to 0 (D/A conversion operation stop), D/A conversion stops, the
ANOn pin goes into a high-impedance state when the PM11n bit of the PM11 register = 1 (input mode), and the
ANOn pin outputs the set value of the P11 register when the PM11n bit = 0 (output mode).
Cautions 1. Even if 1, 0, and then 1 is set to the DACEn bit, there is a wait after 1 is set for the last time.
2. If the DACSWn or DACSn register is rewritten during the settling time, D/A conversion is aborted
and reconversion by using the rewritten values starts.
Remark n = 0, 1
11.4.2 Operation in real-time output mode
D/A conversion is performed using the interrupt request signals (INTTM04 and INTTM05) ^Note of timer channels 4 and 5
as triggers.
The setting method is described below.
Note Channel 0 of the D/A converter: INTTM04
Channel 1 of the D/A converter: INTTM05
<1> Set bit 6 (DACEN) of peripheral enable register 0 (PER0) to 1 to start the supply of the input clock to the D/A
converter.
<2> Set the DAMDn bit of the D/A converter mode register (DAM) to 0 (normal mode).
<3> Use the bit 6 (DAREF) of the DAM register to select the D/A converter reference voltage supply on the positive
side.
<4> Use the DARESn bit of the DAM register to select the resolution of the D/A converter.
<5> Set the analog voltage value to be output to the ANOn pin to the D/A conversion value setting register Wn
(DACSWn) or D/A conversion value setting register n (DACSn).
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011