UPD78F1502AGK-GAK-AX Datasheet, PDF (146/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 4 PORT FUNCTIONS
4.2.1 Port 0
<R>
P00/CAPH
P01/CAPL
P02/VLC3
78K0R/LF3
(80 pins: μ PD78F15x0A,
78F1501A, 78F15x2A)
78K0R/LG3
(100 pins: μ PD78F15x3A,
78F1504A, 78F15x5A)
√
√
√
78K0R/LH3
(128 pins: μ PD78F15x6A,
78F1507A, 78F15x8A)
Port 0 is an I/O port with an output latch. Port 0 can be set to the input mode or output mode in 1-bit units using port
mode register 0 (PM0). When the P00 to P02 pins are used as an input port, use of an on-chip pull-up resistor can be
specified in 1-bit units by pull-up resistor option register 0 (PU0).
This port can also be used for connecting a capacitor for LCD controller/driver, and power supply voltage pin for driving
the LCD.
Reset signal generation sets port 0 to input mode.
Figures 4-1 and 4-2 show block diagrams of port 0.
Caution To use P00/CAPH, P01/CAPL, and P02/VLC3 as a general-purpose port, set bit 5 (MDSET1) and bit 4
(MDSET0) of LCD mode register (LCDMD) to “0”, which is the same as their default status setting.
R01UH0004EJ0501 Rev.5.01
130
Jun 20, 2011