UPD78F1502AGK-GAK-AX Datasheet, PDF (589/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
Table 14-7. Relationship between register settings and pins
(Channel 2 of unit 0: CSI10, UART1 transmission, IIC10)
SE MD MD SOE SO CKO TXE RXE PM P15 PM14 P14 PM13 P13
02 022 021 02 02 02 02 02 15
Note2 Note2
Note1
Operation mode
Pin Function
SCK10/ SI10/SDA10/ SO10/
SCL10/ RxD1/INTP4 TxD1/
INTP7/P15 /P14 ^Note2 TO04/P13
000 0 1 1 0 0 × ×
××××
Operation stop INTP7/P15 INTP4/P14 TO04/P13
01
Note3 Note3 Note3 Note3 Note3 Note3
mode
RxD1/INTP4/
P14
10
INTP4/P14
1 00
01
0 10
1
011 0
1 0/1 1 1
Note4
1 0/1 1 1
Note4
0 1 0/1 0
Note4
1 0/1 0/1 1
Note4 Note4
1 0/1 0/1 1
Note4 Note4
1 0/1 1 1
Note4
0 0/1 0/1 0
Note6 Note6
1
0
1 0/1 0/1 1
Note4 Note4
11 × 1 × × ×
Slave CSI10
Note3 Note3
reception
SCK10
(input)
SI10 TO04/P13
01 × × × 0 1
Note3 Note3
Slave CSI10
transmission
SCK10
(input)
INTP4/P14
SO10
11 × 1 × 0 1
Slave CSI10
SCK10
transmission /reception (input)
SI10
SO10
10 1 1 × × ×
Master CSI10
Note3 Note3
reception
SCK10
(output)
SI10 TO04/P13
00 1 × × 0 1
Note3 Note3
Master CSI10
transmission
SCK10
(output)
INTP4/P14
SO10
10 1 1 × 0 1
Master CSI10
SCK10
transmission /reception (output)
SI10
SO10
0× × × × 0
Note3 Note3 Note3 Note3
1
UART1
INTP7/P15 RxD1/INTP4/ TxD1
transmission ^Note5
P14
00 1 0 1 × ×
IIC10
Note3 Note3
0
start condition
SCL10
SDA10 TO04/P13
1
0 0 1 0 1 × × IIC10 address field SCL10
Note3 Note3
transmission
SDA10 TO04/P13
1 0/1 0/1 1 0 0 1 0 1 × ×
IIC10 data
Note4 Note4
Note3 Note3
transmission
1 0/1 0/1 0 1 0 1 0 1 × ×
Note4 Note4
Note3 Note3
IIC10 data
reception
SCL10
SCL10
SDA10 TO04/P13
SDA10 TO04/P13
0
0 0/1 0/1 0 0 0 1 0 1 × ×
IIC10
SCL10
SDA10 TO04/P13
Note7 Note7
10
Note3 Note3
stop condition
01
Notes 1. The SE0 register is a read-only status register which is set using the SS0 and ST0 registers.
2. When channel 3 of unit 0 is set to UART1 reception, this pin becomes an RxD1 function pin (refer to Table 14-8).
In this case, operation stop mode or UART1 transmission must be selected for channel 2 of unit 0.
3. This pin can be set as a port function pin.
4. This is 0 or 1, depending on the communication operation. For details, refer to 14.3 (12) Serial output register
m (SOm).
5. When using UART1 transmission and reception in a pair, set channel 3 of unit 0 to UART1 reception (refer to
Table 14-8).
6. Set the CKO02 bit to 1 before a start condition is generated. Clear the SO02 bit from 1 to 0 when the start
condition is generated.
7. Set the CKO02 bit to 1 before a stop condition is generated. Clear the SO02 bit from 0 to 1 when the stop
condition is generated.
Remark X: Don’t care
R01UH0004EJ0501 Rev.5.01
573
Jun 20, 2011