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UPD78F1502AGK-GAK-AX Datasheet, PDF (308/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers
78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
(b) When operation starts with TOMpq = 1 setting (Combination operation mode (PWM output))
When TOMpq = 1, the active level is determined by TOLpq setting.
Figure 6-29. TOpq Pin Output Status at PWM Output (TOMpq = 1)
TOEpq
Default level, TOLpq setting
TOpq = 0, TOLpq = 0 Hi-Z
(Active high)
TOpq = 1, TOLpq = 0 Hi-Z
(Active high)
TOpq = 0, TOLpq = 1 Hi-Z
(Active low)
No change
TOpq = 1, TOLpq = 1 Hi-Z
(Active low)
Dependent on TOpq setting
Dependent on TOLpq setting
Port output is enabled
Set
Reset
Set
Reset
Set
TOpq pin transition
(3) Operation of TOpq pin in combination operation mode (TOMpq = 1)
(a) When TOLpq setting has been changed during timer operation
When the TOLpq setting has been changed during timer operation, the setting becomes valid at the generation
timing of TOpq change condition. Rewriting TOLpq does not change the output level of TOpq.
The following figure shows the operation when the value of TOLpq has been changed during timer operation
(TOMpq = 1).
Figure 6-30. Operation when TOLpq Has Been Changed during Timer Operation
Internal set signal
Internal reset signal
TOLpq
TOpq pin
TOpq does not change Set/reset signals are inverted
Remarks 1. Set:
The output signal of TOpq pin changes from inactive level to active level.
Reset: The output signal of TOpq pin changes from active level to inactive level.
2. pq: Unit number + Channel number (only for channels provided with timer I/O pins)
78K0R/LF3: pq = 00 to 04, 07
78K0R/LG3: pq = 00 to 07
78K0R/LH3: pq = 00 to 07, 10 to 13
R01UH0004EJ0501 Rev.5.01
292
Jun 20, 2011