UPD78F1502AGK-GAK-AX Datasheet, PDF (571/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
(2) Operation procedure
Figure 14-89. Initial Setting Procedure for Address Field Transmission
Starting initial setting
Setting PER0 register
Setting SPSm register
Release the serial array unit from the
reset status and start clock supply.
Set the prescaler.
Setting SMRmn register
Set an operation mode, etc.
Setting SCRmn register
Set a communication format.
Setting SDRmn register
Set a transfer baud rate.
Setting SOm register
Setting port
Setting SOm register
Wait
Setting SOm register
Changing setting of SOEm register
Writing to SSm register
Starting communication
Manipulate the SOmn and CKOmn bits
and set an initial output level.
Enable data output, clock output, and the N-ch
open-drain output (VDD tolerance) mode of the
target channel by setting a port register, a port
mode register, and a port output mode register.
Clear the SOmn bit to 0 to generate the
start condition.
Secure a wait time so that the specifications of
I²C on the slave side are satisfied.
Clear the CKOmn bit to 0 to lower the
clock output level.
Set the SOEmn bit to 1 and enable data
output of the target channel.
Set the SSmn bit of the target channel to
1 to set SEmn = 1.
Set address and R/W to the SIOr register
(bits 7 to 0 of the SDRmn register) and
start communication.
Caution After setting the SAUmEN to 1, be sure to set the SPSm register after 4 or more clocks have
elapsed.
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011