UPD78F1502AGK-GAK-AX Datasheet, PDF (585/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
14.8 Processing Procedure in Case of Error
The processing procedure to be followed if an error of each type occurs is described in Figures 14-100 to 14-102.
Figure 14-100. Processing Procedure in Case of Parity Error or Overrun Error
Software Manipulation
Reads SDRmn register.
Reads SSRmn register.
Writes SIRmn register.
Hardware Status
BFF = 0, and channel n is enabled to
receive data.
Error flag is cleared.
Remark
This is to prevent an overrun error if
the next reception is completed
during error processing.
Error type is identified and the read
value is used to clear error flag.
Error can be cleared only during
reading, by writing the value read
from the SSRmn register to the
SIRmn register without modification.
Figure 14-101. Processing Procedure in Case of Framing Error
Software Manipulation
Reads SDRmn register.
Reads SSRmn register.
Writes SIRmn register.
Sets STmn bit to 1.
Synchronization with other party of
communication
Sets SSmn bit to 1.
Hardware Status
BFF = 0, and channel n is enabled to
receive data.
Error flag is cleared.
SEmn = 0, and channel n stops
operation.
SEmn = 1, and channel n is enabled to
operate.
Remark
This is to prevent an overrun error if
the next reception is completed
during error processing.
Error type is identified and the read
value is used to clear error flag.
Error can be cleared only during
reading, by writing the value read
from the SSRmn register to the
SIRmn register without modification.
Synchronization with the other party
of communication is re-established
and communication is resumed
because it is considered that a
framing error has occurred because
the start bit has been shifted.
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 3)
R01UH0004EJ0501 Rev.5.01
569
Jun 20, 2011