UPD78F1502AGK-GAK-AX Datasheet, PDF (357/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
Figure 6-70. Example of Set Contents of Registers
When Multiple PWM Output Function (Slave Channel) Is Used (output two types of PWMs)
(a) Timer mode register mp, mq (TMRmp, TMRmq)
15 14 13 12 11 10 9
8
7
6
5
TMRmp CKSmp
1/0 0
MAS
CCSmp
STSmp2 STSmp1 STSmp0 CISmp1 CISmp0
TERmp
0
0
0
1
0
0
0
0
0
15 14 13 12 11 10 9
8
7
6
5
TMRmq CKSmq
1/0 0
MAS
CCSmq
STSmq2 STSmq1 STSmq0 CISmq1 CISmq0
TERmq
0
0
0
1
0
0
0
0
0
4
3
2
1
0
MDmp3 MDmp2 MDmp1 MDmp0
0
1
0
0
1
4
3
2
1
0
MDmq3 MDmq2 MDmq1 MDmq0
0
1
0
0
1
Operation mode of channel p, q
100B: One-count mode
Start trigger during operation
1: Trigger input is valid.
Selection of TImp and TImq pin input edge
00B: Sets 00B because these are not used.
Start trigger selection
100B: Selects INTTMmn of master channel.
Slave/master selection
0: Channel 0 is set as slave channel.
Count clock selection
0: Selects operation clock.
Operation clock selection
0: Selects CKm0 as operation clock of channel p, q.
1: Selects CKm1 as operation clock of channel p, q.
* Make the same setting as master channel.
(b) Timer output register m (TOm)
Bit q Bit p
TOm
TOmq TOmp
1/0 1/0
0: Outputs 0 from TOmp or TOmq.
1: Outputs 1 from TOmp or TOmq.
(c) Timer output enable register m (TOEm)
Bit q Bit p
TOEm
TOEmq TOEmp
1/0 1/0
0: Stops the TOmp or TOmq output operation by counting operation.
1: Enables the TOmp or TOmq output operation by counting operation.
(d) Timer output level register m (TOLm)
Bit q Bit p
TOLm
TOLmq TOLmp
1/0 1/0
0: Positive logic output (active-high)
1: Inverted output (active-low)
(e) Timer output mode register m (TOMm)
Bit q Bit p
TOMm
TOMmq TOMmp
1
1
1: Sets the combination operation mode.
R01UH0004EJ0501 Rev.5.01
341
Jun 20, 2011