UPD78F1502AGK-GAK-AX Datasheet, PDF (274/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
(1) Timer/counter register mn (TCRmn)
TCRmn is a 16-bit read-only register and is used to count clocks.
The value of this counter is incremented or decremented in synchronization with the rising edge of a count clock.
Whether the counter is incremented or decremented depends on the operation mode that is selected by the
MDmn3 to MDmn0 bits of TMRmn.
Figure 6-3. Format of Timer/Counter Register mn (TCRmn)
Address: F0180H, F0181H (TCR00) to F018EH, F018FH (TCR07) After reset: FFFFH R
F01C0H, F01C1H (TCR10) to F01C6H, F01C7H (TCR13)
F0181H (TCR00)
F0180H (TCR00)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TCRmn
The count value can be read by reading TCRmn.
The count value is set to FFFFH in the following cases.
• When the reset signal is generated
• When the TAU0EN bit (TAU0) and TAU1EN bit (TAU1) of peripheral enable register 0 (PER0) is cleared
The count value is cleared to 0000H in the following cases.
• When the start trigger is input in the capture mode
• When capturing has been completed in the capture mode
• When counting of the slave channel has been completed in the PWM output mode
• When counting of the master/slave channel has been completed in the one-shot pulse output mode
• When counting of the slave channel has been completed in the multiple PWM output mode
Caution The count value is not captured to TDRmn even when TCRmn is read.
Remark mn: Unit number + Channel number
mn = 00 to 07, 10 to 13
R01UH0004EJ0501 Rev.5.01
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Jun 20, 2011