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UPD78F1502AGK-GAK-AX Datasheet, PDF (290/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers
78K0R/Lx3
CHAPTER 6 TIMER ARRAY UNIT
(d) Start timing in one-count mode
<1> Writing 1 to TSpq sets TEpq = 1
<2> Enters the start trigger input wait status, and TCRpq holds the initial value.
<3> On start trigger detection, the “TDRpq value” is loaded to TCRpq and count starts.
Figure 6-14. Start Timing (In One-count Mode)
fCLK
TSpq (write)
<1>
TEpq
TIN edge detection signal
Count clock Note
TSpq (write) hold signal
Start trigger detection signal
TCRpq
<2>
Initial value
Start trigger input wait status
<3>
TDRpq value
Note When the one-count mode is set, the operation clock (MCK) is selected as count clock (CCSpq = 0).
Caution An input signal sampling error is generated since operation starts upon start trigger detection
(The error is one count clock when TIpq is used).
Remark
pq: Unit number + Channel number (only for channels provided with timer I/O pins)
78K0R/LF3: pq = 00 to 04, 07, 06 (only when used as the master)
78K0R/LG3: pq = 00 to 07
78K0R/LH3: pq = 00 to 07, 10 to 13
R01UH0004EJ0501 Rev.5.01
274
Jun 20, 2011