UPD78F1502AGK-GAK-AX Datasheet, PDF (668/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 15 SERIAL INTERFACE IICA
The meanings of <7> to <15> in (3) Data ~ data ~ stop condition in Figure 15-32 are explained below.
<7> When data transfer is complete, the slave device sends an ACK by hardware to the master device. The
ACK is detected by the master device (ACKD = 1) at the rising edge of the 9th clock.
<8> The master device and slave device set a wait status (SCL0 = 0) at the falling edge of the 9th clock, and
both the master device and slave device issue an interrupt (INTIICA: end of transfer).
<9> The master device writes the data to transmit to the IICA shift register (IICA) and releases the wait status
that it set by the master device.
<10> The slave device reads the received data and releases the wait status (WREL = 1). The master device then
starts transferring data to the slave device.
<11> When data transfer is complete, the slave device sends an ACK by hardware to the master device. The
ACK is detected by the master device (ACKD = 1) at the rising edge of the 9th clock.
<12> The master device and slave device set a wait status (SCL0 = 0) at the falling edge of the 9th clock, and
both the master device and slave device issue an interrupt (INTIICA: end of transfer).
<13> The slave device reads the received data and releases the wait status (WREL = 1).
<14> After a stop condition trigger is set, the bus data line is cleared (SDA0 = 0) and the bus clock line is set
(SCL0 = 1). The stop condition is then generated by setting the bus data line (SDA0 = 1) after the stop
condition setup time has elapsed.
<15> When a stop condition is generated, the slave device detects the stop condition and issues an interrupt
(INTIICA: stop condition).
Remark <1> to <15> in Figure 15-32 represent the entire procedure for communicating data using the I²C bus.
Figure 15-32 (1) Start condition ~ address ~ data shows the processing from <1> to <6>, Figure 15-32
(2) Address ~ data ~ data shows the processing from <3> to <10>, and Figure 15-32 (3) Data ~ data ~
stop condition shows the processing from <7> to <15>.
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Jun 20, 2011