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UPD78F1502AGK-GAK-AX Datasheet, PDF (578/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers
78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
(1) Register setting
Figure 14-95. Example of Contents of Registers for Data Reception of Simplified I2C (IIC10, IIC20)
(a) Serial output register m (SOm) … Do not manipulate this register during data
transmission/reception.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SOm
CKOm2 CKOm1 CKOm0
SOm2 SOm1 SOm0
0
0
0
0
1 0/1Note × 0/1Note 0
0
0
0
1 0/1Note × 0/1Note
(b) Serial output enable register m (SOEm) … Do not manipulate this register during data
transmission/reception.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SOEm
SOEm2 SOEm1 SOEm0
0 0 0 0 0 0 0 0 0 0 0 0 0 0/1 × 0/1
(c) Serial channel start register m (SSm) … Do not manipulate this register during data
transmission/reception.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SSm
SSm3 SSm2 SSm1 SSm0
0 0 0 0 0 0 0 0 0 0 0 0 × 0/1 × 0/1
(d) Serial mode register mn (SMRmn) … Do not manipulate this register during data
transmission/reception.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SMRmn CKSmn CCSmn
STSmn
SISmn0
MDmn2 MDmn1 MDmn0
0/1 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0
(e) Serial communication operation setting register mn (SCRmn) … Do not manipulate the bits of this
register, except the TXEmn and
RXEmn bits, during data
transmission/reception.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SCRmn TXEmn RXEmn DAPmn CKPmn
EOCmn PTCmn1 PTCmn0 DIRmn
SLCmn1 SLCmn0
DLSmn2 DLSmn1 DLSmn0
0100000000010111
(f) Serial data register mn (SDRmn) (lower 8 bits: SIOr)
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SDRmn
Baud rate setting
0
Dummy transmit data setting (FFH)
SIOr
Note The value varies depending on the communication data during communication operation.
Remark
m: Unit number (m = 0, 1), n: Channel number (n = 0, 2), r: IIC number (r = 10, 20)
: Setting is fixed in the IIC mode, : Setting disabled (set to the initial value)
×: Bit that cannot be used in this mode (set to the initial value when not used in any mode)
0/1: Set to 0 or 1 depending on the usage of the user
R01UH0004EJ0501 Rev.5.01
562
Jun 20, 2011