UPD78F1502AGK-GAK-AX Datasheet, PDF (481/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 14 SERIAL ARRAY UNIT
(15) Noise filter enable register 0 (NFEN0)
NFEN0 is used to set whether the noise filter can be used for the input signal from the serial data input pin to each
channel.
Disable the noise filter of the pin used for CSI or simplified I²C communication, by clearing the corresponding bit of
this register to 0.
Enable the noise filter of the pin used for UART communication, by setting the corresponding bit of this register to
1.
When the noise filter is enabled, CPU/peripheral operating clock (fCLK) is synchronized with 2-clock match
detection.
NFEN0 can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation clears this register to 00H.
Figure 14-18. Format of Noise Filter Enable Register 0 (NFEN0)
Address: F0060H After reset: 00H R/W
Symbol
7
6
5
4
3
2
1
0
NFEN0
0
SNFEN30
0
SNFEN20
0
SNFEN10
0
SNFEN00
SNFEN30 Use of noise filter of RXD3/P50/SEGx (78K0R/LF3: x = 30, 78K0R/LG3: x = 39, 78K0R/LH3: x = 53) pin
0
Noise filter OFF
1
Noise filter ON
Set SNFEN30 to 1 to use the RXD3 pin.
Clear SNFEN30 to 0 to use the P50 or SEGx pins.
SNFEN20
Use of noise filter of RXD2/P11/SI20/SDA20/INTP6 pin
0
Noise filter OFF
1
Noise filter ON
Set SNFEN20 to 1 to use the RXD2 pin.
Clear SNFEN20 to 0 to use the P11, SI20, SDA20 or INTP6 pins.
SNFEN10
Use of noise filter of RXD1/P14/SI10/SDA10/INTP4 pin
0
Noise filter OFF
1
Noise filter ON
Set SNFEN10 to 1 to use the RXD1 pin.
Clear SNFEN10 to 0 to use the P14, SI10, SDA10 or INTP4 pins.
SNFEN00
Use of noise filter of RXD0/P80/SI00/INTP9 pin
0
Noise filter OFF
1
Noise filter ON
Set SNFEN00 to 1 to use the RXD0 pin.
Clear SNFEN00 to 0 to use the P80, SI00 or INTP9.
Caution Be sure to clear bits 7, 5, 3, and 1 to “0”.
R01UH0004EJ0501 Rev.5.01
465
Jun 20, 2011