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UPD78F1502AGK-GAK-AX Datasheet, PDF (763/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers
78K0R/Lx3
CHAPTER 19 INTERRUPT FUNCTIONS
Table 19-2. Flags Corresponding to Interrupt Request Sources (2/2)
LF3 LG3 LH3
Interrupt
Source
√
√
√ INTST1Note 1
√
√
√ INTCSI10Note 1
√
√
√ INTIIC10Note 1
√ √ √ INTSR1
√ √ √ INTSRE1
− √ √ INTIICA
√ √ √ INTTM00
√ √ √ INTTM01
√ √ √ INTTM02
√ √ √ INTTM03
√ √ √ INTAD
√ √ √ INTRTC
√ √ √ INTRTCI
− − √ INTKR
√
√
√ INTST2Note 2
√
√
√ INTCSI20Note 2
√
√
√ INTIIC20Note 2
√ √ √ INTSR2
√ √ √ INTSRE2
√ √ √ INTTM04
√ √ √ INTTM05
√ √ √ INTTM06
√ √ √ INTTM07
√ √ √ INTP6
√ √ √ INTP7
− √ √ INTP8
− √ √ INTP9
− √ √ INTP10
− √ √ INTP11
√ √ √ INTTM10
√ √ √ INTTM11
√ √ √ INTTM12
√ √ √ INTTM13
√ √ √ INTMD
Interrupt Request Flag
Interrupt Mask Flag
Priority Specification Flag
STIF1Note 1
CSIIF10Note 1
Register
IF1L
STMK1Note 1
CSIMK10Note 1
Register
MK1L
STPR01, STPR11Note 1
CSIPR010, CSIPR110Note 1
Register
PR01L,
PR11L
IICIF10Note 1
IICMK10Note 1
IICPR010, IICPR110Note 1
SRIF1
SRMK1
SRPR01, SRPR11
SREIF1
SREMK1
SREPR01, SREPR11
IICAIF
IICAMK
IICAPR0, IICAPR1
TMIF00
TMMK00
TMPR000, TMPR100
TMIF01
TMMK01
TMPR001, TMPR101
TMIF02
TMMK02
TMPR002, TMPR102
TMIF03
TMMK03
TMPR003, TMPR103
ADIF
RTCIF
IF1H
ADMK
RTCMK
MK1H
ADPR0, ADPR1
RTCPR0, RTCPR1
PR01H,
PR11H
RTCIIF
RTCIMK
RTCIPR0, RTCIPR1
KRIF
KRMK
KRPR0, KRPR1
STIF2Note 2
STMK2Note 2
STPR02, STPR12Note 2
CSIIF20Note 2
CSIMK20Note 2
CSIPR020, CSIPR120Note 2
IICIF20Note 2
IICMK20Note 2
IICPR020, IICPR120Note 2
SRIF2
SRMK2
SRPR02, SRPR12
SREIF2
SREMK2
SREPR02, SREPR12
TMIF04
TMMK04
TMPR004, TMPR104
TMIF05
TMIF06
IF2L
TMMK05
TMMK06
MK2L
TMPR005, TMPR105
TMPR006, TMPR106
PR02L,
PR12L
TMIF07
TMMK07
TMPR007, TMPR107
PIF6
PMK6
PPR06, PPR16
PIF7
PMK7
PPR07, PPR17
PIF8
PMK8
PPR08, PPR18
PIF9
PMK9
PPR09, PPR19
PIF10
PMK10
PPR010, PPR110
PIF11
TMIF10
IF2H
PMK11
TMMK10
MK2H
PPR011, PPR111
TMPR010, TMPR110
PR02H,
PR12H
TMIF11
TMMK11
TMPR011, TMPR111
TMIF12
TMMK12
TMPR012, TMPR112
TMIF13
TMMK13
TMPR013, TMPR113
MDIF
MDMK
MDPR0, MDPR1
Notes 1. Do not use UART1, CSI10, and IIC10 at the same time because they share flags for the interrupt request
sources. If one of the interrupt sources INTST1, INTCSI10, and INTIIC10 is generated, bit 0 of IF1L is set to
1. Bit 0 of MK1L, PR01L, and PR11L supports these three interrupt sources.
2. Do not use UART2, CSI20, and IIC20 at the same time because they share flags for the interrupt request
sources. If one of the interrupt sources INTST2, INTCSI20, and INTIIC20 is generated, bit 4 of IF1H is set to
1. Bit 4 of MK1H, PR01H, and PR11H supports these three interrupt sources.
R01UH0004EJ0501 Rev.5.01
747
Jun 20, 2011