UPD78F1502AGK-GAK-AX Datasheet, PDF (423/1031 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcontrollers

78K0R/Lx3
CHAPTER 10 12-BIT A/D CONVERTER (μ PD78F150xA),
10-BIT A/D CONVERTER (μ PD78F151xA)
(2) Software trigger mode (Single conversion mode)
<1> By setting bit 7 (ADCS) of the A/D converter mode register (ADM) to 1, the A/D conversion operation of the
voltage, which is applied to the analog input pin specified by the analog input channel specification register
(ADS), is started.
<2> When A/D conversion has been completed, the result of the A/D conversion is stored in the A/D conversion result
register (ADCR, ADCRH), and an interrupt request signal (INTAD) is generated. When one A/D conversion has
been completed, ADCS is automatically cleared and an A/D conversion wait state is entered.
<3> If 1 is written to ADCS during A/D conversion, the A/D conversion operation under execution is stopped and
restarted from the beginning. At this time, the conversion result immediately before is retained.
<4> If ADS is rewritten during A/D conversion, the A/D conversion operation under execution is stopped and restarted
from the beginning. At this time, the conversion result immediately before is retained.
<5> If 0 is written to ADCS during A/D conversion, A/D conversion is immediately stopped. At this time, the
conversion result immediately before is retained.
Figure 10-19. Software trigger mode (Single conversion mode)
<1> ADCS = 1
<1> ADCS = 1
<3> ADCS = 1
<1> ADCS = 1
<5> ADCS = 0
ADCS
A/D conversion
ADCR,
ADCRH
<2> A/D conversion
is completed
<2> A/D conversion
<4> Rewriting ADS ^{is completed}
ANIn
Wait
state
ANIn
ANIn
ANIm
Conversion operation
under execution is
stopped, and restarted
from the beginning
Wait AN
state Im
Conversion operation
under execution is
stopped
ANIn
ANIm
INTAD
Remark 78K0R/LF3:
n = 0 to 6, 15, m = 0 to 6, 15
78K0R/LG3, 78K0R/LH3: n = 0 to 10, 15, m = 0 to 10, 15
R01UH0004EJ0501 Rev.5.01
407
Jun 20, 2011